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samples/bpf: xdpsock: order memory on AArch64
Define u_smp_rmb() and u_smp_wmb() to respective barrier instructions. This ensures the processor will order accesses to queue indices against accesses to queue ring entries. Signed-off-by: Brian Brooks <brian.brooks@linaro.org> Acked-by: Björn Töpel <bjorn.topel@intel.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
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@ -145,8 +145,13 @@ static void dump_stats(void);
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} while (0)
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#define barrier() __asm__ __volatile__("": : :"memory")
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#ifdef __aarch64__
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#define u_smp_rmb() __asm__ __volatile__("dmb ishld": : :"memory")
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#define u_smp_wmb() __asm__ __volatile__("dmb ishst": : :"memory")
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#else
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#define u_smp_rmb() barrier()
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#define u_smp_wmb() barrier()
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#endif
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#define likely(x) __builtin_expect(!!(x), 1)
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#define unlikely(x) __builtin_expect(!!(x), 0)
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