AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-02 06:26:39 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

net/fsl_pq_mdio: use spin_event_timeout() to poll the indicator register

Browse Source 
Macro spin_event_timeout() was designed for simple polling of hardware
registers with a timeout, so use it when we poll the MIIMIND register.
This allows us to return an error code instead of polling indefinitely.

Note that PHY_INIT_TIMEOUT is a count of loop iterations, so we can't use
it for spin_event_timeout(), which asks for microseconds.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Timur Tabi 2012-07-09 16:57:36 -05:00 committed by David S. Miller
parent 9fa32e94dc
commit 59399c5926
1 changed files with 19 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

29
drivers/net/ethernet/freescale/fsl_pq_mdio.c
View File

@ -47,6 +47,9 @@
#include "gianfar.h"
#include "fsl_pq_mdio.h"
/* Number of microseconds to wait for an MII register to respond */
#define MII_TIMEOUT 1000
struct fsl_pq_mdio_priv {
void __iomem *map;
struct fsl_pq_mdio __iomem *regs;
@ -64,6 +67,8 @@ struct fsl_pq_mdio_priv {
int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
int regnum, u16 value)
{
u32 status;
/* Set the PHY address and the register address we want to write */
out_be32(&regs->miimadd, (mii_id << 8) | regnum);
@ -71,10 +76,10 @@ int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id,
out_be32(&regs->miimcon, value);
/* Wait for the transaction to finish */
while (in_be32(&regs->miimind) & MIIMIND_BUSY)
cpu_relax();
status = spin_event_timeout(!(in_be32(&regs->miimind) & MIIMIND_BUSY),
MII_TIMEOUT, 0);
return 0;
return status ? 0 : -ETIMEDOUT;
}
/*
@ -91,6 +96,7 @@ int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs,
int mii_id, int regnum)
{
u16 value;
u32 status;
/* Set the PHY address and the register address we want to read */
out_be32(&regs->miimadd, (mii_id << 8) | regnum);
@ -99,9 +105,12 @@ int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs,
out_be32(&regs->miimcom, 0);
out_be32(&regs->miimcom, MII_READ_COMMAND);
/* Wait for the transaction to finish */
while (in_be32(&regs->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY))
cpu_relax();
/* Wait for the transaction to finish, normally less than 100us */
status = spin_event_timeout(!(in_be32(&regs->miimind) &
(MIIMIND_NOTVALID | MIIMIND_BUSY)),
MII_TIMEOUT, 0);
if (!status)
return -ETIMEDOUT;
/* Grab the value of the register from miimstat */
value = in_be32(&regs->miimstat);
@ -144,7 +153,7 @@ int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
static int fsl_pq_mdio_reset(struct mii_bus *bus)
{
struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus);
int timeout = PHY_INIT_TIMEOUT;
u32 status;
mutex_lock(&bus->mdio_lock);
@ -155,12 +164,12 @@ static int fsl_pq_mdio_reset(struct mii_bus *bus)
out_be32(&regs->miimcfg, MIIMCFG_INIT_VALUE);
/* Wait until the bus is free */
while ((in_be32(&regs->miimind) & MIIMIND_BUSY) && timeout--)
cpu_relax();
status = spin_event_timeout(!(in_be32(&regs->miimind) & MIIMIND_BUSY),
MII_TIMEOUT, 0);
mutex_unlock(&bus->mdio_lock);
if (timeout < 0) {
if (!status) {
printk(KERN_ERR "%s: The MII Bus is stuck!\n",
bus->name);
return -EBUSY;