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drm/i915/dc3co: Do the full calculation of DC3CO exit only once
This will calculaet the DC3CO exit delay only once per full modeset. Cc: Imre Deak <imre.deak@intel.com> Cc: Anshuman Gupta <anshuman.gupta@intel.com> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200122182617.18597-1-jose.souza@intel.com
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@ -802,8 +802,10 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
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dev_priv->psr.busy_frontbuffer_bits = 0;
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dev_priv->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
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dev_priv->psr.dc3co_enabled = !!crtc_state->dc3co_exitline;
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dev_priv->psr.dc3co_exit_delay = intel_get_frame_time_us(crtc_state);
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dev_priv->psr.transcoder = crtc_state->cpu_transcoder;
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/* DC5/DC6 requires at least 6 idle frames */
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val = usecs_to_jiffies(intel_get_frame_time_us(crtc_state) * 6);
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dev_priv->psr.dc3co_exit_delay = val;
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/*
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* If a PSR error happened and the driver is reloaded, the EDP_PSR_IIR
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@ -1277,8 +1279,6 @@ static void
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tgl_dc3co_flush(struct drm_i915_private *dev_priv,
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unsigned int frontbuffer_bits, enum fb_op_origin origin)
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{
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u32 delay;
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mutex_lock(&dev_priv->psr.lock);
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if (!dev_priv->psr.dc3co_enabled)
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@ -1296,10 +1296,8 @@ tgl_dc3co_flush(struct drm_i915_private *dev_priv,
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goto unlock;
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tgl_psr2_enable_dc3co(dev_priv);
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/* DC5/DC6 required idle frames = 6 */
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delay = 6 * dev_priv->psr.dc3co_exit_delay;
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mod_delayed_work(system_wq, &dev_priv->psr.idle_work,
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usecs_to_jiffies(delay));
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dev_priv->psr.dc3co_exit_delay);
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unlock:
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mutex_unlock(&dev_priv->psr.lock);
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