mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-07 06:16:41 +07:00
drm/nouveau/core: rename subclass.base to subclass.superclass
Makes things a bit more readable. This is specially important now as upcoming commits are going to be gradually removing the use of macros for down-casts, in favour of compile-time checking. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
2f4a58e852
commit
587f7a5b7c
@ -190,7 +190,7 @@ nouveau_client_dtor(struct nouveau_object *object)
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nvkm_client_notify_del(client, i);
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nouveau_object_ref(NULL, &client->device);
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nouveau_handle_destroy(client->root);
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nouveau_namedb_destroy(&client->base);
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nouveau_namedb_destroy(&client->namedb);
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}
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static struct nouveau_oclass
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@ -125,10 +125,10 @@ nouveau_engctx_destroy(struct nouveau_engctx *engctx)
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if (client->vm)
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atomic_dec(&client->vm->engref[nv_engidx(engobj)]);
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if (engctx->base.size)
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nouveau_gpuobj_destroy(&engctx->base);
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if (engctx->gpuobj.size)
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nouveau_gpuobj_destroy(&engctx->gpuobj);
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else
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nouveau_object_destroy(&engctx->base.base);
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nouveau_object_destroy(&engctx->gpuobj.object);
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}
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int
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@ -140,7 +140,7 @@ nouveau_engctx_init(struct nouveau_engctx *engctx)
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struct nouveau_subdev *pardev;
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int ret;
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ret = nouveau_gpuobj_init(&engctx->base);
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ret = nouveau_gpuobj_init(&engctx->gpuobj);
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if (ret)
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return ret;
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@ -186,7 +186,7 @@ nouveau_engctx_fini(struct nouveau_engctx *engctx, bool suspend)
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}
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nv_debug(parent, "detached %s context\n", subdev->name);
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return nouveau_gpuobj_fini(&engctx->base, suspend);
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return nouveau_gpuobj_fini(&engctx->gpuobj, suspend);
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}
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int
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@ -47,7 +47,7 @@ nouveau_gpuobj_destroy(struct nouveau_gpuobj *gpuobj)
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if (gpuobj->heap.block_size)
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nouveau_mm_fini(&gpuobj->heap);
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nouveau_object_destroy(&gpuobj->base);
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nouveau_object_destroy(&gpuobj->object);
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}
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int
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@ -290,7 +290,7 @@ nouveau_gpudup_dtor(struct nouveau_object *object)
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{
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struct nouveau_gpuobj *gpuobj = (void *)object;
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nouveau_object_ref(NULL, &gpuobj->parent);
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nouveau_object_destroy(&gpuobj->base);
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nouveau_object_destroy(&gpuobj->object);
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}
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static struct nouveau_oclass
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@ -150,7 +150,7 @@ nouveau_parent_destroy(struct nouveau_parent *parent)
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kfree(sclass);
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}
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nouveau_object_destroy(&parent->base);
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nouveau_object_destroy(&parent->object);
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}
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@ -38,11 +38,11 @@ nouveau_subdev_reset(struct nouveau_object *subdev)
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int
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nouveau_subdev_init(struct nouveau_subdev *subdev)
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{
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int ret = nouveau_object_init(&subdev->base);
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int ret = nouveau_object_init(&subdev->object);
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if (ret)
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return ret;
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nouveau_subdev_reset(&subdev->base);
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nouveau_subdev_reset(&subdev->object);
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return 0;
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}
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@ -60,7 +60,7 @@ nouveau_subdev_fini(struct nouveau_subdev *subdev, bool suspend)
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nv_mask(subdev, 0x000200, subdev->unit, subdev->unit);
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}
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return nouveau_object_fini(&subdev->base, suspend);
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return nouveau_object_fini(&subdev->object, suspend);
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}
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int
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@ -74,7 +74,7 @@ nouveau_subdev_destroy(struct nouveau_subdev *subdev)
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{
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int subidx = nv_hclass(subdev) & 0xff;
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nv_device(subdev)->subdev[subidx] = NULL;
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nouveau_object_destroy(&subdev->base);
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nouveau_object_destroy(&subdev->object);
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}
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void
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@ -616,7 +616,7 @@ nouveau_device_dtor(struct nouveau_object *object)
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if (nv_subdev(device)->mmio)
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iounmap(nv_subdev(device)->mmio);
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nouveau_engine_destroy(&device->base);
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nouveau_engine_destroy(&device->engine);
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}
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resource_size_t
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@ -127,7 +127,7 @@ nouveau_fifo_channel_destroy(struct nouveau_fifo_chan *chan)
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nouveau_gpuobj_ref(NULL, &chan->pushgpu);
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nouveau_object_ref(NULL, (struct nouveau_object **)&chan->pushdma);
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nouveau_namedb_destroy(&chan->base);
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nouveau_namedb_destroy(&chan->namedb);
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}
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void
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@ -629,7 +629,7 @@ nv04_fifo_init(struct nouveau_object *object)
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nv_wr32(priv, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
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((priv->ramht->bits - 9) << 16) |
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(priv->ramht->base.addr >> 8));
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(priv->ramht->gpuobj.addr >> 8));
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nv_wr32(priv, NV03_PFIFO_RAMRO, priv->ramro->addr >> 8);
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nv_wr32(priv, NV03_PFIFO_RAMFC, priv->ramfc->addr >> 8);
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@ -193,7 +193,7 @@ nv17_fifo_init(struct nouveau_object *object)
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nv_wr32(priv, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
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((priv->ramht->bits - 9) << 16) |
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(priv->ramht->base.addr >> 8));
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(priv->ramht->gpuobj.addr >> 8));
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nv_wr32(priv, NV03_PFIFO_RAMRO, priv->ramro->addr >> 8);
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nv_wr32(priv, NV03_PFIFO_RAMFC, priv->ramfc->addr >> 8 | 0x00010000);
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@ -314,7 +314,7 @@ nv40_fifo_init(struct nouveau_object *object)
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nv_wr32(priv, NV03_PFIFO_RAMHT, (0x03 << 24) /* search 128 */ |
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((priv->ramht->bits - 9) << 16) |
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(priv->ramht->base.addr >> 8));
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(priv->ramht->gpuobj.addr >> 8));
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nv_wr32(priv, NV03_PFIFO_RAMRO, priv->ramro->addr >> 8);
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switch (nv_device(priv)->chipset) {
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@ -246,7 +246,7 @@ nv50_fifo_chan_ctor_dma(struct nouveau_object *parent,
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nv_wo32(base->ramfc, 0x7c, 0x30000001);
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nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
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(4 << 24) /* SEARCH_FULL */ |
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(chan->ramht->base.node->offset >> 4));
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(chan->ramht->gpuobj.node->offset >> 4));
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bar->flush(bar);
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return 0;
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}
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@ -310,7 +310,7 @@ nv50_fifo_chan_ctor_ind(struct nouveau_object *parent,
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nv_wo32(base->ramfc, 0x7c, 0x30000001);
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nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
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(4 << 24) /* SEARCH_FULL */ |
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(chan->ramht->base.node->offset >> 4));
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(chan->ramht->gpuobj.node->offset >> 4));
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bar->flush(bar);
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return 0;
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}
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@ -219,7 +219,7 @@ nv84_fifo_chan_ctor_dma(struct nouveau_object *parent,
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nv_wo32(base->ramfc, 0x7c, 0x30000001);
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nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
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(4 << 24) /* SEARCH_FULL */ |
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(chan->ramht->base.node->offset >> 4));
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(chan->ramht->gpuobj.node->offset >> 4));
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nv_wo32(base->ramfc, 0x88, base->cache->addr >> 10);
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nv_wo32(base->ramfc, 0x98, nv_gpuobj(base)->addr >> 12);
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bar->flush(bar);
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@ -292,7 +292,7 @@ nv84_fifo_chan_ctor_ind(struct nouveau_object *parent,
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nv_wo32(base->ramfc, 0x7c, 0x30000001);
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nv_wo32(base->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
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(4 << 24) /* SEARCH_FULL */ |
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(chan->ramht->base.node->offset >> 4));
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(chan->ramht->gpuobj.node->offset >> 4));
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nv_wo32(base->ramfc, 0x88, base->cache->addr >> 10);
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nv_wo32(base->ramfc, 0x98, nv_gpuobj(base)->addr >> 12);
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bar->flush(bar);
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@ -4,7 +4,7 @@
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#include <core/namedb.h>
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struct nouveau_client {
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struct nouveau_namedb base;
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struct nouveau_namedb namedb;
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struct nouveau_handle *root;
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struct nouveau_object *device;
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char name[32];
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@ -64,7 +64,7 @@ enum nv_subdev_type {
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};
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struct nouveau_device {
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struct nouveau_engine base;
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struct nouveau_engine engine;
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struct list_head head;
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struct pci_dev *pdev;
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@ -10,7 +10,7 @@
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#define NV_ENGCTX(name,var) NV_ENGCTX_(NVDEV_ENGINE_##name, (var))
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struct nouveau_engctx {
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struct nouveau_gpuobj base;
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struct nouveau_gpuobj gpuobj;
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struct nouveau_vma vma;
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struct list_head head;
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unsigned long save;
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@ -8,7 +8,7 @@
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#define NV_ENGINE(name,var) NV_ENGINE_(NVDEV_ENGINE_##name, (var))
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struct nouveau_engine {
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struct nouveau_subdev base;
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struct nouveau_subdev subdev;
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struct nouveau_oclass *cclass;
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struct nouveau_oclass *sclass;
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@ -40,11 +40,11 @@ nv_engidx(struct nouveau_object *object)
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sizeof(**r),(void **)r)
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#define nouveau_engine_destroy(p) \
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nouveau_subdev_destroy(&(p)->base)
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nouveau_subdev_destroy(&(p)->subdev)
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#define nouveau_engine_init(p) \
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nouveau_subdev_init(&(p)->base)
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nouveau_subdev_init(&(p)->subdev)
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#define nouveau_engine_fini(p,s) \
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nouveau_subdev_fini(&(p)->base, (s))
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nouveau_subdev_fini(&(p)->subdev, (s))
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int nouveau_engine_create_(struct nouveau_object *, struct nouveau_object *,
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struct nouveau_oclass *, bool, const char *,
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@ -14,7 +14,7 @@ struct nouveau_vm;
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#define NVOBJ_FLAG_HEAP 0x00000004
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struct nouveau_gpuobj {
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struct nouveau_object base;
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struct nouveau_object object;
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struct nouveau_object *parent;
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struct nouveau_mm_node *node;
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struct nouveau_mm heap;
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@ -37,8 +37,8 @@ nv_gpuobj(void *obj)
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#define nouveau_gpuobj_create(p,e,c,v,g,s,a,f,d) \
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nouveau_gpuobj_create_((p), (e), (c), (v), (g), (s), (a), (f), \
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sizeof(**d), (void **)d)
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#define nouveau_gpuobj_init(p) nouveau_object_init(&(p)->base)
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#define nouveau_gpuobj_fini(p,s) nouveau_object_fini(&(p)->base, (s))
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#define nouveau_gpuobj_init(p) nouveau_object_init(&(p)->object)
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#define nouveau_gpuobj_fini(p,s) nouveau_object_fini(&(p)->object, (s))
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int nouveau_gpuobj_create_(struct nouveau_object *, struct nouveau_object *,
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struct nouveau_oclass *, u32 pclass,
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struct nouveau_object *, u32 size, u32 align,
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@ -59,7 +59,7 @@ void nouveau_gpuobj_unmap(struct nouveau_vma *);
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static inline void
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nouveau_gpuobj_ref(struct nouveau_gpuobj *obj, struct nouveau_gpuobj **ref)
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{
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nouveau_object_ref(&obj->base, (struct nouveau_object **)ref);
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nouveau_object_ref(&obj->object, (struct nouveau_object **)ref);
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}
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void _nouveau_gpuobj_dtor(struct nouveau_object *);
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@ -6,7 +6,7 @@
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struct nouveau_handle;
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struct nouveau_namedb {
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struct nouveau_parent base;
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struct nouveau_parent parent;
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rwlock_t lock;
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struct list_head list;
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};
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@ -25,11 +25,11 @@ nv_namedb(void *obj)
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nouveau_namedb_create_((p), (e), (c), (v), (s), (m), \
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sizeof(**d), (void **)d)
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#define nouveau_namedb_init(p) \
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nouveau_parent_init(&(p)->base)
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nouveau_parent_init(&(p)->parent)
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#define nouveau_namedb_fini(p,s) \
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nouveau_parent_fini(&(p)->base, (s))
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nouveau_parent_fini(&(p)->parent, (s))
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#define nouveau_namedb_destroy(p) \
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nouveau_parent_destroy(&(p)->base)
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nouveau_parent_destroy(&(p)->parent)
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int nouveau_namedb_create_(struct nouveau_object *, struct nouveau_object *,
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struct nouveau_oclass *, u32 pclass,
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@ -11,7 +11,7 @@ struct nouveau_sclass {
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};
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struct nouveau_parent {
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struct nouveau_object base;
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struct nouveau_object object;
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struct nouveau_sclass *sclass;
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u64 engine;
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@ -40,9 +40,9 @@ nv_parent(void *obj)
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nouveau_parent_create_((p), (e), (c), (v), (s), (m), \
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sizeof(**d), (void **)d)
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#define nouveau_parent_init(p) \
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nouveau_object_init(&(p)->base)
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nouveau_object_init(&(p)->object)
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#define nouveau_parent_fini(p,s) \
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nouveau_object_fini(&(p)->base, (s))
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nouveau_object_fini(&(p)->object, (s))
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int nouveau_parent_create_(struct nouveau_object *, struct nouveau_object *,
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struct nouveau_oclass *, u32 pclass,
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@ -4,7 +4,7 @@
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#include <core/gpuobj.h>
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struct nouveau_ramht {
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struct nouveau_gpuobj base;
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struct nouveau_gpuobj gpuobj;
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int bits;
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};
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@ -17,7 +17,7 @@ int nouveau_ramht_new(struct nouveau_object *, struct nouveau_object *,
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static inline void
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nouveau_ramht_ref(struct nouveau_ramht *obj, struct nouveau_ramht **ref)
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{
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nouveau_gpuobj_ref(&obj->base, (struct nouveau_gpuobj **)ref);
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nouveau_gpuobj_ref(&obj->gpuobj, (struct nouveau_gpuobj **)ref);
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}
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#endif
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@ -7,7 +7,7 @@
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#define NV_SUBDEV(name,var) NV_SUBDEV_(NVDEV_SUBDEV_##name, (var))
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struct nouveau_subdev {
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struct nouveau_object base;
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struct nouveau_object object;
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struct mutex mutex;
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const char *name;
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void __iomem *mmio;
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@ -7,7 +7,7 @@
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#include <core/event.h>
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struct nouveau_fifo_chan {
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struct nouveau_namedb base;
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struct nouveau_namedb namedb;
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struct nouveau_dmaobj *pushdma;
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struct nouveau_gpuobj *pushgpu;
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void __iomem *user;
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@ -27,9 +27,9 @@ nouveau_fifo_chan(void *obj)
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nouveau_fifo_channel_create_((p), (e), (c), (b), (a), (s), (n), \
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(m), sizeof(**d), (void **)d)
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#define nouveau_fifo_channel_init(p) \
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nouveau_namedb_init(&(p)->base)
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nouveau_namedb_init(&(p)->namedb)
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#define nouveau_fifo_channel_fini(p,s) \
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nouveau_namedb_fini(&(p)->base, (s))
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nouveau_namedb_fini(&(p)->namedb, (s))
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int nouveau_fifo_channel_create_(struct nouveau_object *,
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struct nouveau_object *,
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@ -48,17 +48,17 @@ void _nouveau_fifo_channel_wr32(struct nouveau_object *, u64, u32);
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int _nouveau_fifo_channel_ntfy(struct nouveau_object *, u32, struct nvkm_event **);
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struct nouveau_fifo_base {
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struct nouveau_gpuobj base;
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struct nouveau_gpuobj gpuobj;
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};
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#define nouveau_fifo_context_create(p,e,c,g,s,a,f,d) \
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nouveau_gpuobj_create((p), (e), (c), 0, (g), (s), (a), (f), (d))
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#define nouveau_fifo_context_destroy(p) \
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nouveau_gpuobj_destroy(&(p)->base)
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nouveau_gpuobj_destroy(&(p)->gpuobj)
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#define nouveau_fifo_context_init(p) \
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nouveau_gpuobj_init(&(p)->base)
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nouveau_gpuobj_init(&(p)->gpuobj)
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#define nouveau_fifo_context_fini(p,s) \
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nouveau_gpuobj_fini(&(p)->base, (s))
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nouveau_gpuobj_fini(&(p)->gpuobj, (s))
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#define _nouveau_fifo_context_dtor _nouveau_gpuobj_dtor
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#define _nouveau_fifo_context_init _nouveau_gpuobj_init
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@ -116,8 +116,7 @@ nvc0_vm_map(struct nouveau_vma *vma, struct nouveau_gpuobj *pgt,
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pte <<= 3;
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if (mem->tag) {
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struct nouveau_ltc *ltc =
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nouveau_ltc(vma->vm->vmm->base.base.parent);
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struct nouveau_ltc *ltc = nouveau_ltc(vma->vm->vmm);
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u32 tag = mem->tag->offset + (delta >> 17);
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phys |= (u64)tag << (32 + 12);
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next |= (u64)1 << (32 + 12);
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