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MIPS: Octeon: Use board_cache_error_setup for cache error handler setup.

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Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3820/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney 2012-05-15 00:04:48 -07:00 committed by Ralf Baechle
parent e3dc81f230
commit 586016ebf7
1 changed files with 8 additions and 6 deletions
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14
arch/mips/mm/c-octeon.c
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@ -21,6 +21,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/r4kcache.h>
#include <asm/traps.h>
#include <asm/mmu_context.h>
#include <asm/war.h>
@ -248,6 +249,11 @@ static void __cpuinit probe_octeon(void)
}
}
static void __cpuinit octeon_cache_error_setup(void)
{
extern char except_vec2_octeon;
set_handler(0x100, &except_vec2_octeon, 0x80);
}
/**
* Setup the Octeon cache flush routines
@ -255,12 +261,6 @@ static void __cpuinit probe_octeon(void)
*/
void __cpuinit octeon_cache_init(void)
{
extern unsigned long ebase;
extern char except_vec2_octeon;
memcpy((void *)(ebase + 0x100), &except_vec2_octeon, 0x80);
octeon_flush_cache_sigtramp(ebase + 0x100);
probe_octeon();
shm_align_mask = PAGE_SIZE - 1;
@ -280,6 +280,8 @@ void __cpuinit octeon_cache_init(void)
build_clear_page();
build_copy_page();
board_cache_error_setup = octeon_cache_error_setup;
}
/**