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drm/amd/amdgpu: Correct VRAM width for APUs with GMC9

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DDR4 has a 64-bit width not 128-bits.  It was reporting
twice the width.  Tested with my Ryzen 2400G.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tom St Denis 2018-02-26 09:09:26 -05:00 committed by Alex Deucher
parent 45a9d154f6
commit 585b7f161c
1 changed files with 4 additions and 1 deletions
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5
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
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@ -722,7 +722,10 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev); adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
if (!adev->gmc.vram_width) { if (!adev->gmc.vram_width) {
/* hbm memory channel size */ /* hbm memory channel size */
chansize = 128; if (adev->flags & AMD_IS_APU)
chansize = 64;
else
chansize = 128;
tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0); tmp = RREG32_SOC15(DF, 0, mmDF_CS_AON0_DramBaseAddress0);
tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK; tmp &= DF_CS_AON0_DramBaseAddress0__IntLvNumChan_MASK;