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arm64: dts: imx8mq: add clock for GPIO node
i.MX8MQ has clock gate for each GPIO bank, add clock info to GPIO node for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -172,6 +172,7 @@ gpio1: gpio@30200000 {
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reg = <0x30200000 0x10000>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_GPIO1_ROOT>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@ -183,6 +184,7 @@ gpio2: gpio@30210000 {
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reg = <0x30210000 0x10000>;
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interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_GPIO2_ROOT>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@ -194,6 +196,7 @@ gpio3: gpio@30220000 {
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reg = <0x30220000 0x10000>;
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interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_GPIO3_ROOT>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@ -205,6 +208,7 @@ gpio4: gpio@30230000 {
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reg = <0x30230000 0x10000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_GPIO4_ROOT>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@ -216,6 +220,7 @@ gpio5: gpio@30240000 {
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reg = <0x30240000 0x10000>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_GPIO5_ROOT>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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