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drm/i915/gvt: Refine port select logic for CFL platform
Refine the code since the port select definition for CFL is different than SKL/BXT. v2: - replace PCH_CNP with IS_COFFEELAKE. (zhenyu) Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: fred gao <fred.gao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@ -77,6 +77,22 @@ static unsigned char edid_get_byte(struct intel_vgpu *vgpu)
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return chr;
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}
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static inline int cnp_get_port_from_gmbus0(u32 gmbus0)
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{
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int port_select = gmbus0 & _GMBUS_PIN_SEL_MASK;
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int port = -EINVAL;
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if (port_select == GMBUS_PIN_1_BXT)
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port = PORT_B;
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else if (port_select == GMBUS_PIN_2_BXT)
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port = PORT_C;
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else if (port_select == GMBUS_PIN_3_BXT)
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port = PORT_D;
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else if (port_select == GMBUS_PIN_4_CNP)
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port = PORT_E;
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return port;
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}
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static inline int bxt_get_port_from_gmbus0(u32 gmbus0)
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{
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int port_select = gmbus0 & _GMBUS_PIN_SEL_MASK;
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@ -133,6 +149,8 @@ static int gmbus0_mmio_write(struct intel_vgpu *vgpu,
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if (IS_BROXTON(dev_priv))
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port = bxt_get_port_from_gmbus0(pin_select);
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else if (IS_COFFEELAKE(dev_priv))
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port = cnp_get_port_from_gmbus0(pin_select);
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else
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port = get_port_from_gmbus0(pin_select);
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if (WARN_ON(port < 0))
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