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drm/i915/uc: Rename intel_uc_is_using* into intel_uc_supports*

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Rename intel_uc_is_using* into intel_uc_supports* to make clear
distinction from actual state (compare intel_uc_fw_is_running)

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190731223321.36436-2-michal.wajdeczko@intel.com
This commit is contained in:
Michal Wajdeczko 2019-07-31 22:33:18 +00:00 committed by Chris Wilson
parent 9dfe3459ef
commit 57a68c3507
5 changed files with 32 additions and 32 deletions
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8
drivers/gpu/drm/i915/gt/uc/intel_guc.c
View File

@ -144,7 +144,7 @@ static u32 guc_ctl_feature_flags(struct intel_guc *guc)
{ {
u32 flags = 0; u32 flags = 0;
if (!intel_uc_is_using_guc_submission(&guc_to_gt(guc)->uc)) if (!intel_uc_supports_guc_submission(&guc_to_gt(guc)->uc))
flags |= GUC_CTL_DISABLE_SCHEDULER; flags |= GUC_CTL_DISABLE_SCHEDULER;
return flags; return flags;
@ -154,7 +154,7 @@ static u32 guc_ctl_ctxinfo_flags(struct intel_guc *guc)
{ {
u32 flags = 0; u32 flags = 0;
if (intel_uc_is_using_guc_submission(&guc_to_gt(guc)->uc)) { if (intel_uc_supports_guc_submission(&guc_to_gt(guc)->uc)) {
u32 ctxnum, base; u32 ctxnum, base;
base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool); base = intel_guc_ggtt_offset(guc, guc->stage_desc_pool);
@ -290,7 +290,7 @@ int intel_guc_init(struct intel_guc *guc)
if (ret) if (ret)
goto err_ads; goto err_ads;
if (intel_uc_is_using_guc_submission(&gt->uc)) { if (intel_uc_supports_guc_submission(&gt->uc)) {
/* /*
* This is stuff we need to have available at fw load time * This is stuff we need to have available at fw load time
* if we are planning to enable submission later * if we are planning to enable submission later
@ -329,7 +329,7 @@ void intel_guc_fini(struct intel_guc *guc)
i915_ggtt_disable_guc(gt->ggtt); i915_ggtt_disable_guc(gt->ggtt);
if (intel_uc_is_using_guc_submission(&gt->uc)) if (intel_uc_supports_guc_submission(&gt->uc))
intel_guc_submission_fini(guc); intel_guc_submission_fini(guc);
intel_guc_ct_fini(&guc->ct); intel_guc_ct_fini(&guc->ct);

2
drivers/gpu/drm/i915/gt/uc/intel_huc.c
View File

@ -185,7 +185,7 @@ int intel_huc_check_status(struct intel_huc *huc)
intel_wakeref_t wakeref; intel_wakeref_t wakeref;
u32 status = 0; u32 status = 0;
if (!intel_uc_is_using_huc(&gt->uc)) if (!intel_uc_supports_huc(&gt->uc))
return -ENODEV; return -ENODEV;
with_intel_runtime_pm(&gt->i915->runtime_pm, wakeref) with_intel_runtime_pm(&gt->i915->runtime_pm, wakeref)

44
drivers/gpu/drm/i915/gt/uc/intel_uc.c
View File

@ -95,11 +95,11 @@ static void sanitize_options_early(struct intel_uc *uc)
DRM_DEBUG_DRIVER("enable_guc=%d (submission:%s huc:%s)\n", DRM_DEBUG_DRIVER("enable_guc=%d (submission:%s huc:%s)\n",
i915_modparams.enable_guc, i915_modparams.enable_guc,
yesno(intel_uc_is_using_guc_submission(uc)), yesno(intel_uc_supports_guc_submission(uc)),
yesno(intel_uc_is_using_huc(uc))); yesno(intel_uc_supports_huc(uc)));
/* Verify GuC firmware availability */ /* Verify GuC firmware availability */
if (intel_uc_is_using_guc(uc) && !intel_uc_fw_supported(guc_fw)) { if (intel_uc_supports_guc(uc) && !intel_uc_fw_supported(guc_fw)) {
DRM_WARN("Incompatible option detected: enable_guc=%d, " DRM_WARN("Incompatible option detected: enable_guc=%d, "
"but GuC is not supported!\n", "but GuC is not supported!\n",
i915_modparams.enable_guc); i915_modparams.enable_guc);
@ -108,7 +108,7 @@ static void sanitize_options_early(struct intel_uc *uc)
} }
/* Verify HuC firmware availability */ /* Verify HuC firmware availability */
if (intel_uc_is_using_huc(uc) && !intel_uc_fw_supported(huc_fw)) { if (intel_uc_supports_huc(uc) && !intel_uc_fw_supported(huc_fw)) {
DRM_WARN("Incompatible option detected: enable_guc=%d, " DRM_WARN("Incompatible option detected: enable_guc=%d, "
"but HuC is not supported!\n", "but HuC is not supported!\n",
i915_modparams.enable_guc); i915_modparams.enable_guc);
@ -117,7 +117,7 @@ static void sanitize_options_early(struct intel_uc *uc)
} }
/* XXX: GuC submission is unavailable for now */ /* XXX: GuC submission is unavailable for now */
if (intel_uc_is_using_guc_submission(uc)) { if (intel_uc_supports_guc_submission(uc)) {
DRM_INFO("Incompatible option detected: enable_guc=%d, " DRM_INFO("Incompatible option detected: enable_guc=%d, "
"but GuC submission is not supported!\n", "but GuC submission is not supported!\n",
i915_modparams.enable_guc); i915_modparams.enable_guc);
@ -309,21 +309,21 @@ void intel_uc_fetch_firmwares(struct intel_uc *uc)
{ {
struct drm_i915_private *i915 = uc_to_gt(uc)->i915; struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
if (!intel_uc_is_using_guc(uc)) if (!intel_uc_supports_guc(uc))
return; return;
intel_uc_fw_fetch(&uc->guc.fw, i915); intel_uc_fw_fetch(&uc->guc.fw, i915);
if (intel_uc_is_using_huc(uc)) if (intel_uc_supports_huc(uc))
intel_uc_fw_fetch(&uc->huc.fw, i915); intel_uc_fw_fetch(&uc->huc.fw, i915);
} }
void intel_uc_cleanup_firmwares(struct intel_uc *uc) void intel_uc_cleanup_firmwares(struct intel_uc *uc)
{ {
if (!intel_uc_is_using_guc(uc)) if (!intel_uc_supports_guc(uc))
return; return;
if (intel_uc_is_using_huc(uc)) if (intel_uc_supports_huc(uc))
intel_uc_fw_cleanup_fetch(&uc->huc.fw); intel_uc_fw_cleanup_fetch(&uc->huc.fw);
intel_uc_fw_cleanup_fetch(&uc->guc.fw); intel_uc_fw_cleanup_fetch(&uc->guc.fw);
@ -335,20 +335,20 @@ int intel_uc_init(struct intel_uc *uc)
struct intel_huc *huc = &uc->huc; struct intel_huc *huc = &uc->huc;
int ret; int ret;
if (!intel_uc_is_using_guc(uc)) if (!intel_uc_supports_guc(uc))
return 0; return 0;
if (!intel_uc_fw_supported(&guc->fw)) if (!intel_uc_fw_supported(&guc->fw))
return -ENODEV; return -ENODEV;
/* XXX: GuC submission is unavailable for now */ /* XXX: GuC submission is unavailable for now */
GEM_BUG_ON(intel_uc_is_using_guc_submission(uc)); GEM_BUG_ON(intel_uc_supports_guc_submission(uc));
ret = intel_guc_init(guc); ret = intel_guc_init(guc);
if (ret) if (ret)
return ret; return ret;
if (intel_uc_is_using_huc(uc)) { if (intel_uc_supports_huc(uc)) {
ret = intel_huc_init(huc); ret = intel_huc_init(huc);
if (ret) if (ret)
goto err_guc; goto err_guc;
@ -365,12 +365,12 @@ void intel_uc_fini(struct intel_uc *uc)
{ {
struct intel_guc *guc = &uc->guc; struct intel_guc *guc = &uc->guc;
if (!intel_uc_is_using_guc(uc)) if (!intel_uc_supports_guc(uc))
return; return;
GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw)); GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
if (intel_uc_is_using_huc(uc)) if (intel_uc_supports_huc(uc))
intel_huc_fini(&uc->huc); intel_huc_fini(&uc->huc);
intel_guc_fini(guc); intel_guc_fini(guc);
@ -391,7 +391,7 @@ static void __uc_sanitize(struct intel_uc *uc)
void intel_uc_sanitize(struct intel_uc *uc) void intel_uc_sanitize(struct intel_uc *uc)
{ {
if (!intel_uc_is_using_guc(uc)) if (!intel_uc_supports_guc(uc))
return; return;
__uc_sanitize(uc); __uc_sanitize(uc);
@ -404,11 +404,11 @@ static int uc_init_wopcm(struct intel_uc *uc)
struct intel_uncore *uncore = gt->uncore; struct intel_uncore *uncore = gt->uncore;
u32 base = intel_wopcm_guc_base(&gt->i915->wopcm); u32 base = intel_wopcm_guc_base(&gt->i915->wopcm);
u32 size = intel_wopcm_guc_size(&gt->i915->wopcm); u32 size = intel_wopcm_guc_size(&gt->i915->wopcm);
u32 huc_agent = intel_uc_is_using_huc(uc) ? HUC_LOADING_AGENT_GUC : 0; u32 huc_agent = intel_uc_supports_huc(uc) ? HUC_LOADING_AGENT_GUC : 0;
u32 mask; u32 mask;
int err; int err;
GEM_BUG_ON(!intel_uc_is_using_guc(uc)); GEM_BUG_ON(!intel_uc_supports_guc(uc));
GEM_BUG_ON(!(base & GUC_WOPCM_OFFSET_MASK)); GEM_BUG_ON(!(base & GUC_WOPCM_OFFSET_MASK));
GEM_BUG_ON(base & ~GUC_WOPCM_OFFSET_MASK); GEM_BUG_ON(base & ~GUC_WOPCM_OFFSET_MASK);
GEM_BUG_ON(!(size & GUC_WOPCM_SIZE_MASK)); GEM_BUG_ON(!(size & GUC_WOPCM_SIZE_MASK));
@ -447,7 +447,7 @@ int intel_uc_init_hw(struct intel_uc *uc)
struct intel_huc *huc = &uc->huc; struct intel_huc *huc = &uc->huc;
int ret, attempts; int ret, attempts;
if (!intel_uc_is_using_guc(uc)) if (!intel_uc_supports_guc(uc))
return 0; return 0;
GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw)); GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
@ -474,7 +474,7 @@ int intel_uc_init_hw(struct intel_uc *uc)
if (ret) if (ret)
goto err_out; goto err_out;
if (intel_uc_is_using_huc(uc)) { if (intel_uc_supports_huc(uc)) {
ret = intel_huc_fw_upload(huc); ret = intel_huc_fw_upload(huc);
if (ret && intel_uc_fw_is_overridden(&huc->fw)) if (ret && intel_uc_fw_is_overridden(&huc->fw))
goto err_out; goto err_out;
@ -508,7 +508,7 @@ int intel_uc_init_hw(struct intel_uc *uc)
if (ret) if (ret)
goto err_communication; goto err_communication;
if (intel_uc_is_using_guc_submission(uc)) { if (intel_uc_supports_guc_submission(uc)) {
ret = intel_guc_submission_enable(guc); ret = intel_guc_submission_enable(guc);
if (ret) if (ret)
goto err_communication; goto err_communication;
@ -517,7 +517,7 @@ int intel_uc_init_hw(struct intel_uc *uc)
dev_info(i915->drm.dev, "GuC firmware version %u.%u\n", dev_info(i915->drm.dev, "GuC firmware version %u.%u\n",
guc->fw.major_ver_found, guc->fw.minor_ver_found); guc->fw.major_ver_found, guc->fw.minor_ver_found);
dev_info(i915->drm.dev, "GuC submission %s\n", dev_info(i915->drm.dev, "GuC submission %s\n",
enableddisabled(intel_uc_is_using_guc_submission(uc))); enableddisabled(intel_uc_supports_guc_submission(uc)));
dev_info(i915->drm.dev, "HuC %s\n", dev_info(i915->drm.dev, "HuC %s\n",
enableddisabled(intel_huc_is_authenticated(huc))); enableddisabled(intel_huc_is_authenticated(huc)));
@ -553,7 +553,7 @@ void intel_uc_fini_hw(struct intel_uc *uc)
GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw)); GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
if (intel_uc_is_using_guc_submission(uc)) if (intel_uc_supports_guc_submission(uc))
intel_guc_submission_disable(guc); intel_guc_submission_disable(guc);
guc_disable_communication(guc); guc_disable_communication(guc);

6
drivers/gpu/drm/i915/gt/uc/intel_uc.h
View File

@ -49,19 +49,19 @@ void intel_uc_runtime_suspend(struct intel_uc *uc);
int intel_uc_resume(struct intel_uc *uc); int intel_uc_resume(struct intel_uc *uc);
int intel_uc_runtime_resume(struct intel_uc *uc); int intel_uc_runtime_resume(struct intel_uc *uc);
static inline bool intel_uc_is_using_guc(struct intel_uc *uc) static inline bool intel_uc_supports_guc(struct intel_uc *uc)
{ {
GEM_BUG_ON(i915_modparams.enable_guc < 0); GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc > 0; return i915_modparams.enable_guc > 0;
} }
static inline bool intel_uc_is_using_guc_submission(struct intel_uc *uc) static inline bool intel_uc_supports_guc_submission(struct intel_uc *uc)
{ {
GEM_BUG_ON(i915_modparams.enable_guc < 0); GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION; return i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION;
} }
static inline bool intel_uc_is_using_huc(struct intel_uc *uc) static inline bool intel_uc_supports_huc(struct intel_uc *uc)
{ {
GEM_BUG_ON(i915_modparams.enable_guc < 0); GEM_BUG_ON(i915_modparams.enable_guc < 0);
return i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC; return i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC;

4
drivers/gpu/drm/i915/i915_drv.h
View File

@ -2275,8 +2275,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc)
/* Having GuC is not the same as using GuC */ /* Having GuC is not the same as using GuC */
#define USES_GUC(dev_priv) intel_uc_is_using_guc(&(dev_priv)->gt.uc) #define USES_GUC(dev_priv) intel_uc_supports_guc(&(dev_priv)->gt.uc)
#define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission(&(dev_priv)->gt.uc) #define USES_GUC_SUBMISSION(dev_priv) intel_uc_supports_guc_submission(&(dev_priv)->gt.uc)
#define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu) #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu)