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staging: iio: cdc: ad7746: add additional config defines
Introduce defines for shifting and mask under the config register for better readability. Also, introduce helper variables for index calculation. Signed-off-by: Eva Rachel Retuya <eraretuya@gmail.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
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@ -70,8 +70,10 @@
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#define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0)
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/* Config Register Bit Designations (AD7746_REG_CFG) */
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#define AD7746_CONF_VTFS(x) ((x) << 6)
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#define AD7746_CONF_CAPFS(x) ((x) << 3)
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#define AD7746_CONF_VTFS_SHIFT 6
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#define AD7746_CONF_CAPFS_SHIFT 3
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#define AD7746_CONF_VTFS_MASK GENMASK(7, 6)
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#define AD7746_CONF_CAPFS_MASK GENMASK(5, 3)
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#define AD7746_CONF_MODE_IDLE (0 << 0)
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#define AD7746_CONF_MODE_CONT_CONV (1 << 0)
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#define AD7746_CONF_MODE_SINGLE_CONV (2 << 0)
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@ -217,15 +219,16 @@ static int ad7746_select_channel(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan)
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{
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struct ad7746_chip_info *chip = iio_priv(indio_dev);
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int ret, delay;
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int ret, delay, idx;
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u8 vt_setup, cap_setup;
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switch (chan->type) {
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case IIO_CAPACITANCE:
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cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN;
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vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
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delay = ad7746_cap_filter_rate_table[(chip->config >> 3) &
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0x7][1];
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idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
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AD7746_CONF_CAPFS_SHIFT;
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delay = ad7746_cap_filter_rate_table[idx][1];
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if (chip->capdac_set != chan->channel) {
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ret = i2c_smbus_write_byte_data(chip->client,
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@ -246,8 +249,9 @@ static int ad7746_select_channel(struct iio_dev *indio_dev,
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case IIO_TEMP:
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vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN;
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cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
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delay = ad7746_cap_filter_rate_table[(chip->config >> 6) &
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0x3][1];
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idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
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AD7746_CONF_VTFS_SHIFT;
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delay = ad7746_cap_filter_rate_table[idx][1];
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break;
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default:
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return -EINVAL;
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@ -369,8 +373,8 @@ static int ad7746_store_cap_filter_rate_setup(struct ad7746_chip_info *chip,
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if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table))
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i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1;
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chip->config &= ~AD7746_CONF_CAPFS(0x7);
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chip->config |= AD7746_CONF_CAPFS(i);
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chip->config &= ~AD7746_CONF_CAPFS_MASK;
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chip->config |= i << AD7746_CONF_CAPFS_SHIFT;
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return 0;
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}
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@ -387,8 +391,8 @@ static int ad7746_store_vt_filter_rate_setup(struct ad7746_chip_info *chip,
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if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table))
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i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1;
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chip->config &= ~AD7746_CONF_VTFS(0x3);
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chip->config |= AD7746_CONF_VTFS(i);
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chip->config &= ~AD7746_CONF_VTFS_MASK;
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chip->config |= i << AD7746_CONF_VTFS_SHIFT;
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return 0;
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}
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@ -527,7 +531,7 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
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long mask)
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{
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struct ad7746_chip_info *chip = iio_priv(indio_dev);
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int ret, delay;
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int ret, delay, idx;
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u8 regval, reg;
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mutex_lock(&indio_dev->mlock);
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@ -635,13 +639,15 @@ static int ad7746_read_raw(struct iio_dev *indio_dev,
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case IIO_CHAN_INFO_SAMP_FREQ:
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switch (chan->type) {
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case IIO_CAPACITANCE:
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*val = ad7746_cap_filter_rate_table[
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(chip->config >> 3) & 0x7][0];
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idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
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AD7746_CONF_CAPFS_SHIFT;
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*val = ad7746_cap_filter_rate_table[idx][0];
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ret = IIO_VAL_INT;
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break;
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case IIO_VOLTAGE:
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*val = ad7746_vt_filter_rate_table[
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(chip->config >> 6) & 0x3][0];
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idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
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AD7746_CONF_VTFS_SHIFT;
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*val = ad7746_vt_filter_rate_table[idx][0];
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ret = IIO_VAL_INT;
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break;
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default:
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