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drm/amdgpu: AMD SW workaround for certain partner boards
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -699,7 +699,10 @@ static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
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polaris10_golden_common_all,
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(const u32)ARRAY_SIZE(polaris10_golden_common_all));
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WREG32_SMC(ixCG_ACLK_CNTL, 0x0000001C);
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if (adev->pdev->revision == 0xc7) {
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if (adev->pdev->revision == 0xc7 &&
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((adev->pdev->subsystem_device == 0xb37 && adev->pdev->subsystem_vendor == 0x1002) ||
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(adev->pdev->subsystem_device == 0x4a8 && adev->pdev->subsystem_vendor == 0x1043) ||
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(adev->pdev->subsystem_device == 0x9480 && adev->pdev->subsystem_vendor == 0x1682))) {
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amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1E, 0xDD);
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amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1F, 0xD0);
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}
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