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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 10:36:42 +07:00
[PATCH] powerpc: Make CHRP build again
This makes CHRP build again, although it's untested because my Pegasos is currently in pieces. Signed-off-by: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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91dc182ca6
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575e321606
@ -135,12 +135,13 @@ int __init
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hydra_init(void)
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hydra_init(void)
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{
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{
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struct device_node *np;
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struct device_node *np;
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struct resource r;
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np = find_devices("mac-io");
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np = find_devices("mac-io");
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if (np == NULL || np->n_addrs == 0)
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if (np == NULL || of_address_to_resource(np, 0, &r))
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return 0;
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return 0;
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Hydra = ioremap(np->addrs[0].address, np->addrs[0].size);
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Hydra = ioremap(r.start, r.end-r.start);
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printk("Hydra Mac I/O at %lx\n", np->addrs[0].address);
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printk("Hydra Mac I/O at %lx\n", r.start);
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printk("Hydra Feature_Control was %x",
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printk("Hydra Feature_Control was %x",
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in_le32(&Hydra->Feature_Control));
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in_le32(&Hydra->Feature_Control));
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out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN |
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out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN |
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@ -177,18 +178,24 @@ setup_python(struct pci_controller *hose, struct device_node *dev)
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{
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{
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u32 __iomem *reg;
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u32 __iomem *reg;
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u32 val;
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u32 val;
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unsigned long addr = dev->addrs[0].address;
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struct resource r;
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setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010);
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if (of_address_to_resource(dev, 0, &r)) {
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printk(KERN_ERR "No address for Python PCI controller\n");
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return;
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}
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/* Clear the magic go-slow bit */
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/* Clear the magic go-slow bit */
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reg = ioremap(dev->addrs[0].address + 0xf6000, 0x40);
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reg = ioremap(r.start + 0xf6000, 0x40);
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BUG_ON(!reg);
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val = in_be32(®[12]);
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val = in_be32(®[12]);
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if (val & PRG_CL_RESET_VALID) {
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if (val & PRG_CL_RESET_VALID) {
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out_be32(®[12], val & ~PRG_CL_RESET_VALID);
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out_be32(®[12], val & ~PRG_CL_RESET_VALID);
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in_be32(®[12]);
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in_be32(®[12]);
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}
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}
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iounmap(reg);
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iounmap(reg);
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setup_indirect_pci(hose, r.start + 0xf8000, r.start + 0xf8010);
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}
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}
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/* Marvell Discovery II based Pegasos 2 */
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/* Marvell Discovery II based Pegasos 2 */
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@ -218,7 +225,7 @@ chrp_find_bridges(void)
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char *model, *machine;
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char *model, *machine;
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int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
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int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
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struct device_node *root = find_path_device("/");
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struct device_node *root = find_path_device("/");
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struct resource r;
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/*
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/*
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* The PCI host bridge nodes on some machines don't have
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* The PCI host bridge nodes on some machines don't have
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* properties to adequately identify them, so we have to
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* properties to adequately identify them, so we have to
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@ -238,7 +245,7 @@ chrp_find_bridges(void)
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continue;
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continue;
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++index;
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++index;
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/* The GG2 bridge on the LongTrail doesn't have an address */
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/* The GG2 bridge on the LongTrail doesn't have an address */
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if (dev->n_addrs < 1 && !is_longtrail) {
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if (of_address_to_resource(dev, 0, &r) && !is_longtrail) {
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printk(KERN_WARNING "Can't use %s: no address\n",
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printk(KERN_WARNING "Can't use %s: no address\n",
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dev->full_name);
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dev->full_name);
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continue;
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continue;
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@ -255,8 +262,8 @@ chrp_find_bridges(void)
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printk(KERN_INFO "PCI buses %d..%d",
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printk(KERN_INFO "PCI buses %d..%d",
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bus_range[0], bus_range[1]);
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bus_range[0], bus_range[1]);
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printk(" controlled by %s", dev->type);
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printk(" controlled by %s", dev->type);
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if (dev->n_addrs > 0)
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if (!is_longtrail)
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printk(" at %lx", dev->addrs[0].address);
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printk(" at %lx", r.start);
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printk("\n");
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printk("\n");
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hose = pcibios_alloc_controller();
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hose = pcibios_alloc_controller();
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@ -352,9 +352,10 @@ static void __init chrp_find_openpic(void)
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opaddr = opprop[na-1]; /* assume 32-bit */
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opaddr = opprop[na-1]; /* assume 32-bit */
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oplen /= na * sizeof(unsigned int);
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oplen /= na * sizeof(unsigned int);
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} else {
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} else {
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if (np->n_addrs == 0)
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struct resource r;
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if (of_address_to_resource(np, 0, &r))
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return;
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return;
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opaddr = np->addrs[0].address;
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opaddr = r.start;
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oplen = 0;
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oplen = 0;
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}
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}
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@ -377,7 +378,7 @@ static void __init chrp_find_openpic(void)
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*/
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*/
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if (oplen < len) {
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if (oplen < len) {
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printk(KERN_ERR "Insufficient addresses for distributed"
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printk(KERN_ERR "Insufficient addresses for distributed"
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" OpenPIC (%d < %d)\n", np->n_addrs, len);
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" OpenPIC (%d < %d)\n", oplen, len);
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len = oplen;
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len = oplen;
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}
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}
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@ -21,6 +21,7 @@
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#include <linux/mc146818rtc.h>
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#include <linux/mc146818rtc.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/bcd.h>
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#include <linux/bcd.h>
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#include <linux/ioport.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/nvram.h>
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#include <asm/nvram.h>
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@ -37,14 +38,16 @@ static int nvram_data = NVRAM_DATA;
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long __init chrp_time_init(void)
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long __init chrp_time_init(void)
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{
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{
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struct device_node *rtcs;
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struct device_node *rtcs;
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struct resource r;
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int base;
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int base;
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rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
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rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
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if (rtcs == NULL)
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if (rtcs == NULL)
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rtcs = find_compatible_devices("rtc", "ds1385-rtc");
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rtcs = find_compatible_devices("rtc", "ds1385-rtc");
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if (rtcs == NULL || rtcs->addrs == NULL)
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if (rtcs == NULL || of_address_to_resource(rtcs, 0, &r))
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return 0;
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return 0;
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base = rtcs->addrs[0].address;
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base = r.start;
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nvram_as1 = 0;
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nvram_as1 = 0;
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nvram_as0 = base;
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nvram_as0 = base;
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nvram_data = base + 1;
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nvram_data = base + 1;
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