AuxXxilium/linux_dsm_epyc7002
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ARM: dts: rockchip: remove broken-cd from emmc and sdio

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Only one of "broken-cd" and "non-removable" should be supplied
according to Documentation/devicetree/bindings/mmc/mmc.txt.
Obviously emmc and sdio-wifi are non-removable devices, while
broken-cd is for removable device whose card detect pin is broken.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Shawn Lin 2016-01-26 10:06:43 +08:00 committed by Heiko Stuebner
parent 26f5e19dfb
commit 57375d88fa
8 changed files with 0 additions and 11 deletions
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1
arch/arm/boot/dts/rk3036-kylin.dts
View File

@ -345,7 +345,6 @@ &i2s {
&sdio {
status = "okay";
broken-cd;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;

1
arch/arm/boot/dts/rk3036.dtsi
View File

@ -272,7 +272,6 @@ emmc: dwmmc@1021c000 {
compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x1021c000 0x4000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
clock-frequency = <37500000>;

2
arch/arm/boot/dts/rk3066a-rayeager.dts
View File

@ -182,7 +182,6 @@ phy0: ethernet-phy@0 {
};
&emmc {
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
@ -348,7 +347,6 @@ &mmc0 {
};
&mmc1 {
broken-cd;
bus-width = <4>;
disable-wp;
non-removable;

1
arch/arm/boot/dts/rk3228-evb.dts
View File

@ -53,7 +53,6 @@ memory {
};
&emmc {
broken-cd;
cap-mmc-highspeed;
mmc-ddr-1_8v;
disable-wp;

1
arch/arm/boot/dts/rk3288-evb.dtsi
View File

@ -172,7 +172,6 @@ &cpu0 {
};
&emmc {
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;

2
arch/arm/boot/dts/rk3288-firefly.dtsi
View File

@ -208,7 +208,6 @@ &cpu0 {
};
&emmc {
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
@ -509,7 +508,6 @@ &saradc {
};
&sdio0 {
broken-cd;
bus-width = <4>;
disable-wp;
non-removable;

1
arch/arm/boot/dts/rk3288-popmetal.dts
View File

@ -162,7 +162,6 @@ &cpu0 {
};
&emmc {
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;

2
arch/arm/boot/dts/rk3288-veyron.dtsi
View File

@ -146,7 +146,6 @@ &cpu0 {
&emmc {
status = "okay";
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
rockchip,default-sample-phase = <158>;
@ -347,7 +346,6 @@ &pwm1 {
&sdio0 {
status = "okay";
broken-cd;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;