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drm/amdgpu: remove ih_info parameter of umc_ras_late_init
umc_ras_late_init can get the info by itself Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -23,17 +23,16 @@
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#include "amdgpu_ras.h"
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#include "amdgpu_ras.h"
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int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info)
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int amdgpu_umc_ras_late_init(struct amdgpu_device *adev)
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{
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{
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int r;
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int r;
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struct ras_ih_if *ih_info = (struct ras_ih_if *)ras_ih_info;
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struct ras_fs_if fs_info = {
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struct ras_fs_if fs_info = {
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.sysfs_name = "umc_err_count",
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.sysfs_name = "umc_err_count",
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.debugfs_name = "umc_err_inject",
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.debugfs_name = "umc_err_inject",
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};
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};
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struct ras_ih_if ih_info = {
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if (!ih_info)
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.cb = amdgpu_umc_process_ras_data_cb,
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return -EINVAL;
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};
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if (!adev->umc.ras_if) {
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if (!adev->umc.ras_if) {
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adev->umc.ras_if =
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adev->umc.ras_if =
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@ -45,10 +44,10 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info)
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adev->umc.ras_if->sub_block_index = 0;
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adev->umc.ras_if->sub_block_index = 0;
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strcpy(adev->umc.ras_if->name, "umc");
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strcpy(adev->umc.ras_if->name, "umc");
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}
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}
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ih_info->head = fs_info.head = *adev->umc.ras_if;
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ih_info.head = fs_info.head = *adev->umc.ras_if;
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r = amdgpu_ras_late_init(adev, adev->umc.ras_if,
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r = amdgpu_ras_late_init(adev, adev->umc.ras_if,
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&fs_info, ih_info);
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&fs_info, &ih_info);
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if (r)
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if (r)
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goto free;
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goto free;
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@ -68,7 +67,7 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info)
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return 0;
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return 0;
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late_fini:
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late_fini:
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amdgpu_ras_late_fini(adev, adev->umc.ras_if, ih_info);
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amdgpu_ras_late_fini(adev, adev->umc.ras_if, &ih_info);
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free:
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free:
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kfree(adev->umc.ras_if);
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kfree(adev->umc.ras_if);
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adev->umc.ras_if = NULL;
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adev->umc.ras_if = NULL;
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@ -55,7 +55,7 @@
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struct amdgpu_umc_funcs {
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struct amdgpu_umc_funcs {
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void (*err_cnt_init)(struct amdgpu_device *adev);
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void (*err_cnt_init)(struct amdgpu_device *adev);
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int (*ras_late_init)(struct amdgpu_device *adev, void *ras_ih_info);
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int (*ras_late_init)(struct amdgpu_device *adev);
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void (*query_ras_error_count)(struct amdgpu_device *adev,
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void (*query_ras_error_count)(struct amdgpu_device *adev,
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void *ras_error_status);
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void *ras_error_status);
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void (*query_ras_error_address)(struct amdgpu_device *adev,
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void (*query_ras_error_address)(struct amdgpu_device *adev,
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@ -82,7 +82,7 @@ struct amdgpu_umc {
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const struct amdgpu_umc_funcs *funcs;
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const struct amdgpu_umc_funcs *funcs;
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};
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};
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int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_ih_info);
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int amdgpu_umc_ras_late_init(struct amdgpu_device *adev);
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int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,
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int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,
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void *ras_error_status,
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void *ras_error_status,
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struct amdgpu_iv_entry *entry);
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struct amdgpu_iv_entry *entry);
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@ -740,12 +740,9 @@ static int gmc_v9_0_ecc_late_init(void *handle)
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{
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{
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int r;
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int r;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct ras_ih_if umc_ih_info = {
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.cb = amdgpu_umc_process_ras_data_cb,
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};
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if (adev->umc.funcs && adev->umc.funcs->ras_late_init) {
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if (adev->umc.funcs && adev->umc.funcs->ras_late_init) {
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r = adev->umc.funcs->ras_late_init(adev, &umc_ih_info);
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r = adev->umc.funcs->ras_late_init(adev);
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if (r)
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if (r)
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return r;
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return r;
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}
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}
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