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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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sh-pfc: r8a7778: add SDHI support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Kuninori Morimoto
Simon Horman
parent
a10cd30ed6
commit
564617d2f9
@ -1427,6 +1427,84 @@ SCIF_PFC_DAT(scif5_data_a, TX5_A, RX5_A);
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SCIF_PFC_PIN(scif5_data_b, RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14));
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SCIF_PFC_DAT(scif5_data_b, TX5_B, RX5_B);
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/* - SDHI macro ------------------------------------------------------------- */
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#define SDHI_PFC_PINS(name, args...) SH_PFC_PINS(name, args)
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#define SDHI_PFC_DAT1(name, d0) SH_PFC_MUX1(name, d0)
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#define SDHI_PFC_DAT4(name, d0, d1, d2, d3) SH_PFC_MUX4(name, d0, d1, d2, d3)
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#define SDHI_PFC_CTRL(name, clk, cmd) SH_PFC_MUX2(name, clk, cmd)
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#define SDHI_PFC_CDPN(name, cd) SH_PFC_MUX1(name, cd)
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#define SDHI_PFC_WPPN(name, wp) SH_PFC_MUX1(name, wp)
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/* - SDHI0 ------------------------------------------------------------------ */
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SDHI_PFC_PINS(sdhi0_cd, RCAR_GP_PIN(3, 17));
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SDHI_PFC_CDPN(sdhi0_cd, SD0_CD);
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SDHI_PFC_PINS(sdhi0_ctrl, RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12));
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SDHI_PFC_CTRL(sdhi0_ctrl, SD0_CLK, SD0_CMD);
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SDHI_PFC_PINS(sdhi0_data1, RCAR_GP_PIN(3, 13));
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SDHI_PFC_DAT1(sdhi0_data1, SD0_DAT0);
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SDHI_PFC_PINS(sdhi0_data4, RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
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RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16));
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SDHI_PFC_DAT4(sdhi0_data4, SD0_DAT0, SD0_DAT1,
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SD0_DAT2, SD0_DAT3);
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SDHI_PFC_PINS(sdhi0_wp, RCAR_GP_PIN(3, 18));
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SDHI_PFC_WPPN(sdhi0_wp, SD0_WP);
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/* - SDHI1 ------------------------------------------------------------------ */
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SDHI_PFC_PINS(sdhi1_a_cd, RCAR_GP_PIN(0, 30));
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SDHI_PFC_CDPN(sdhi1_a_cd, SD1_CD_A);
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SDHI_PFC_PINS(sdhi1_a_ctrl, RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6));
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SDHI_PFC_CTRL(sdhi1_a_ctrl, SD1_CLK_A, SD1_CMD_A);
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SDHI_PFC_PINS(sdhi1_a_data1, RCAR_GP_PIN(1, 7));
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SDHI_PFC_DAT1(sdhi1_a_data1, SD1_DAT0_A);
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SDHI_PFC_PINS(sdhi1_a_data4, RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 8),
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RCAR_GP_PIN(0, 5), RCAR_GP_PIN(0, 6));
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SDHI_PFC_DAT4(sdhi1_a_data4, SD1_DAT0_A, SD1_DAT1_A,
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SD1_DAT2_A, SD1_DAT3_A);
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SDHI_PFC_PINS(sdhi1_a_wp, RCAR_GP_PIN(0, 31));
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SDHI_PFC_WPPN(sdhi1_a_wp, SD1_WP_A);
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SDHI_PFC_PINS(sdhi1_b_cd, RCAR_GP_PIN(2, 24));
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SDHI_PFC_CDPN(sdhi1_b_cd, SD1_CD_B);
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SDHI_PFC_PINS(sdhi1_b_ctrl, RCAR_GP_PIN(1, 17), RCAR_GP_PIN(1, 16));
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SDHI_PFC_CTRL(sdhi1_b_ctrl, SD1_CLK_B, SD1_CMD_B);
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SDHI_PFC_PINS(sdhi1_b_data1, RCAR_GP_PIN(1, 18));
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SDHI_PFC_DAT1(sdhi1_b_data1, SD1_DAT0_B);
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SDHI_PFC_PINS(sdhi1_b_data4, RCAR_GP_PIN(1, 18), RCAR_GP_PIN(1, 19),
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RCAR_GP_PIN(1, 20), RCAR_GP_PIN(1, 21));
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SDHI_PFC_DAT4(sdhi1_b_data4, SD1_DAT0_B, SD1_DAT1_B,
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SD1_DAT2_B, SD1_DAT3_B);
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SDHI_PFC_PINS(sdhi1_b_wp, RCAR_GP_PIN(2, 25));
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SDHI_PFC_WPPN(sdhi1_b_wp, SD1_WP_B);
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/* - SDH2 ------------------------------------------------------------------- */
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SDHI_PFC_PINS(sdhi2_a_cd, RCAR_GP_PIN(4, 23));
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SDHI_PFC_CDPN(sdhi2_a_cd, SD2_CD_A);
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SDHI_PFC_PINS(sdhi2_a_ctrl, RCAR_GP_PIN(4, 17), RCAR_GP_PIN(4, 18));
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SDHI_PFC_CTRL(sdhi2_a_ctrl, SD2_CLK_A, SD2_CMD_A);
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SDHI_PFC_PINS(sdhi2_a_data1, RCAR_GP_PIN(4, 19));
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SDHI_PFC_DAT1(sdhi2_a_data1, SD2_DAT0_A);
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SDHI_PFC_PINS(sdhi2_a_data4, RCAR_GP_PIN(4, 19), RCAR_GP_PIN(4, 20),
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RCAR_GP_PIN(4, 21), RCAR_GP_PIN(4, 22));
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SDHI_PFC_DAT4(sdhi2_a_data4, SD2_DAT0_A, SD2_DAT1_A,
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SD2_DAT2_A, SD2_DAT3_A);
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SDHI_PFC_PINS(sdhi2_a_wp, RCAR_GP_PIN(4, 24));
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SDHI_PFC_WPPN(sdhi2_a_wp, SD2_WP_A);
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SDHI_PFC_PINS(sdhi2_b_cd, RCAR_GP_PIN(3, 27));
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SDHI_PFC_CDPN(sdhi2_b_cd, SD2_CD_B);
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SDHI_PFC_PINS(sdhi2_b_ctrl, RCAR_GP_PIN(4, 5), RCAR_GP_PIN(4, 6));
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SDHI_PFC_CTRL(sdhi2_b_ctrl, SD2_CLK_B, SD2_CMD_B);
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SDHI_PFC_PINS(sdhi2_b_data1, RCAR_GP_PIN(4, 7));
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SDHI_PFC_DAT1(sdhi2_b_data1, SD2_DAT0_B);
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SDHI_PFC_PINS(sdhi2_b_data4, RCAR_GP_PIN(4, 7), RCAR_GP_PIN(4, 8),
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RCAR_GP_PIN(3, 25), RCAR_GP_PIN(3, 26));
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SDHI_PFC_DAT4(sdhi2_b_data4, SD2_DAT0_B, SD2_DAT1_B,
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SD2_DAT2_B, SD2_DAT3_B);
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SDHI_PFC_PINS(sdhi2_b_wp, RCAR_GP_PIN(3, 28));
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SDHI_PFC_WPPN(sdhi2_b_wp, SD2_WP_B);
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(hscif0_data_a),
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SH_PFC_PIN_GROUP(hscif0_data_b),
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@ -1471,6 +1549,31 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(scif4_data_c),
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SH_PFC_PIN_GROUP(scif5_data_a),
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SH_PFC_PIN_GROUP(scif5_data_b),
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SH_PFC_PIN_GROUP(sdhi0_cd),
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SH_PFC_PIN_GROUP(sdhi0_ctrl),
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SH_PFC_PIN_GROUP(sdhi0_data1),
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SH_PFC_PIN_GROUP(sdhi0_data4),
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SH_PFC_PIN_GROUP(sdhi0_wp),
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SH_PFC_PIN_GROUP(sdhi1_a_cd),
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SH_PFC_PIN_GROUP(sdhi1_a_ctrl),
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SH_PFC_PIN_GROUP(sdhi1_a_data1),
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SH_PFC_PIN_GROUP(sdhi1_a_data4),
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SH_PFC_PIN_GROUP(sdhi1_a_wp),
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SH_PFC_PIN_GROUP(sdhi1_b_cd),
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SH_PFC_PIN_GROUP(sdhi1_b_ctrl),
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SH_PFC_PIN_GROUP(sdhi1_b_data1),
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SH_PFC_PIN_GROUP(sdhi1_b_data4),
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SH_PFC_PIN_GROUP(sdhi1_b_wp),
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SH_PFC_PIN_GROUP(sdhi2_a_cd),
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SH_PFC_PIN_GROUP(sdhi2_a_ctrl),
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SH_PFC_PIN_GROUP(sdhi2_a_data1),
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SH_PFC_PIN_GROUP(sdhi2_a_data4),
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SH_PFC_PIN_GROUP(sdhi2_a_wp),
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SH_PFC_PIN_GROUP(sdhi2_b_cd),
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SH_PFC_PIN_GROUP(sdhi2_b_ctrl),
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SH_PFC_PIN_GROUP(sdhi2_b_data1),
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SH_PFC_PIN_GROUP(sdhi2_b_data4),
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SH_PFC_PIN_GROUP(sdhi2_b_wp),
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};
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static const char * const hscif0_groups[] = {
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@ -1543,6 +1646,41 @@ static const char * const scif5_groups[] = {
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"scif5_data_b",
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};
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static const char * const sdhi0_groups[] = {
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"sdhi0_cd",
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"sdhi0_ctrl",
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"sdhi0_data1",
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"sdhi0_data4",
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"sdhi0_wp",
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};
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static const char * const sdhi1_groups[] = {
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"sdhi1_a_cd",
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"sdhi1_a_ctrl",
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"sdhi1_a_data1",
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"sdhi1_a_data4",
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"sdhi1_a_wp",
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"sdhi1_b_cd",
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"sdhi1_b_ctrl",
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"sdhi1_b_data1",
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"sdhi1_b_data4",
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"sdhi1_b_wp",
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};
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static const char * const sdhi2_groups[] = {
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"sdhi2_a_cd",
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"sdhi2_a_ctrl",
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"sdhi2_a_data1",
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"sdhi2_a_data4",
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"sdhi2_a_wp",
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"sdhi2_b_cd",
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"sdhi2_b_ctrl",
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"sdhi2_b_data1",
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"sdhi2_b_data4",
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"sdhi2_b_wp",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(hscif0),
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SH_PFC_FUNCTION(hscif1),
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@ -1553,6 +1691,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(scif3),
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SH_PFC_FUNCTION(scif4),
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SH_PFC_FUNCTION(scif5),
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SH_PFC_FUNCTION(sdhi0),
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SH_PFC_FUNCTION(sdhi1),
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SH_PFC_FUNCTION(sdhi2),
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};
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static struct pinmux_cfg_reg pinmux_config_regs[] = {
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