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ARM: dts: imx6q-arm2: add pinctrl state for usdhc
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -32,12 +32,16 @@ usdhc@02198000 { /* uSDHC3 */
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cd-gpios = <&gpio6 11 0>;
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wp-gpios = <&gpio6 14 0>;
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vmmc-supply = <®_3p3v>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_1>;
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status = "okay";
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};
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usdhc@0219c000 { /* uSDHC4 */
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fsl,card-wired;
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vmmc-supply = <®_3p3v>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4_1>;
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status = "okay";
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};
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@ -470,7 +470,39 @@ gpc@020dc000 {
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};
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iomuxc@020e0000 {
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compatible = "fsl,imx6q-iomuxc";
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reg = <0x020e0000 0x4000>;
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/* shared pinctrl settings */
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usdhc3 {
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pinctrl_usdhc3_1: usdhc3grp-1 {
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fsl,pins = <1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */
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1281 0x10059 /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */
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1289 0x17059 /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */
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1297 0x17059 /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */
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1305 0x17059 /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */
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1312 0x17059 /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */
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1265 0x17059 /* MX6Q_PAD_SD3_DAT4__USDHC3_DAT4 */
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1257 0x17059 /* MX6Q_PAD_SD3_DAT5__USDHC3_DAT5 */
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1249 0x17059 /* MX6Q_PAD_SD3_DAT6__USDHC3_DAT6 */
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1241 0x17059>; /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */
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};
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};
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usdhc4 {
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pinctrl_usdhc4_1: usdhc4grp-1 {
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fsl,pins = <1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */
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1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */
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1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */
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1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */
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1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */
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1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */
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1493 0x17059 /* MX6Q_PAD_SD4_DAT4__USDHC4_DAT4 */
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1501 0x17059 /* MX6Q_PAD_SD4_DAT5__USDHC4_DAT5 */
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1509 0x17059 /* MX6Q_PAD_SD4_DAT6__USDHC4_DAT6 */
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1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
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};
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};
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};
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dcic@020e4000 { /* DCIC1 */
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