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drm/i915/dsi: abstract afe_clk calculation
We'll make more use of it in the future. Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/0341fdc13260625150315b0b57a4227eb766c50f.1575974743.git.jani.nikula@intel.com
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@ -301,18 +301,26 @@ static void configure_dual_link_mode(struct intel_encoder *encoder,
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I915_WRITE(DSS_CTL1, dss_ctl1);
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}
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/* aka DSI 8X clock */
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static int afe_clk(struct intel_encoder *encoder)
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{
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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int bpp;
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bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
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return DIV_ROUND_CLOSEST(intel_dsi->pclk * bpp, intel_dsi->lane_count);
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}
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static void gen11_dsi_program_esc_clk_div(struct intel_encoder *encoder)
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{
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struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
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enum port port;
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u32 bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
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u32 afe_clk_khz; /* 8X Clock */
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int afe_clk_khz;
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u32 esc_clk_div_m;
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afe_clk_khz = DIV_ROUND_CLOSEST(intel_dsi->pclk * bpp,
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intel_dsi->lane_count);
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afe_clk_khz = afe_clk(encoder);
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esc_clk_div_m = DIV_ROUND_UP(afe_clk_khz, DSI_MAX_ESC_CLK);
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for_each_dsi_port(port, intel_dsi->ports) {
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