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drm/amd/powerplay: ACG frequency added in PPTable

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Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2017-08-22 11:19:10 +08:00 committed by Alex Deucher
parent 6af0883ed9
commit 547f1091b9
2 changed files with 12 additions and 5 deletions
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11
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
View File

@ -1558,7 +1558,8 @@ static int vega10_populate_smc_link_levels(struct pp_hwmgr *hwmgr)
*/ */
static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr, static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr,
uint32_t gfx_clock, PllSetting_t *current_gfxclk_level) uint32_t gfx_clock, PllSetting_t *current_gfxclk_level,
uint32_t *acg_freq)
{ {
struct phm_ppt_v2_information *table_info = struct phm_ppt_v2_information *table_info =
(struct phm_ppt_v2_information *)(hwmgr->pptable); (struct phm_ppt_v2_information *)(hwmgr->pptable);
@ -1609,6 +1610,8 @@ static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr,
cpu_to_le16(dividers.usPll_ss_slew_frac); cpu_to_le16(dividers.usPll_ss_slew_frac);
current_gfxclk_level->Did = (uint8_t)(dividers.ulDid); current_gfxclk_level->Did = (uint8_t)(dividers.ulDid);
*acg_freq = gfx_clock / 100; /* 100 Khz to Mhz conversion */
return 0; return 0;
} }
@ -1689,7 +1692,8 @@ static int vega10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
for (i = 0; i < dpm_table->count; i++) { for (i = 0; i < dpm_table->count; i++) {
result = vega10_populate_single_gfx_level(hwmgr, result = vega10_populate_single_gfx_level(hwmgr,
dpm_table->dpm_levels[i].value, dpm_table->dpm_levels[i].value,
&(pp_table->GfxclkLevel[i])); &(pp_table->GfxclkLevel[i]),
&(pp_table->AcgFreqTable[i]));
if (result) if (result)
return result; return result;
} }
@ -1698,7 +1702,8 @@ static int vega10_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
while (i < NUM_GFXCLK_DPM_LEVELS) { while (i < NUM_GFXCLK_DPM_LEVELS) {
result = vega10_populate_single_gfx_level(hwmgr, result = vega10_populate_single_gfx_level(hwmgr,
dpm_table->dpm_levels[j].value, dpm_table->dpm_levels[j].value,
&(pp_table->GfxclkLevel[i])); &(pp_table->GfxclkLevel[i]),
&(pp_table->AcgFreqTable[i]));
if (result) if (result)
return result; return result;
i++; i++;

6
drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h
View File

@ -315,10 +315,12 @@ typedef struct {
uint8_t AcgEnable[NUM_GFXCLK_DPM_LEVELS]; uint8_t AcgEnable[NUM_GFXCLK_DPM_LEVELS];
GbVdroopTable_t AcgBtcGbVdroopTable; GbVdroopTable_t AcgBtcGbVdroopTable;
QuadraticInt_t AcgAvfsGb; QuadraticInt_t AcgAvfsGb;
uint32_t Reserved[4];
/* ACG Frequency Table, in Mhz */
uint32_t AcgFreqTable[NUM_GFXCLK_DPM_LEVELS];
/* Padding - ignore */ /* Padding - ignore */
uint32_t MmHubPadding[7]; /* SMU internal use */ uint32_t MmHubPadding[3]; /* SMU internal use */
} PPTable_t; } PPTable_t;