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arm64: dts: uniphier: Add USB2 PHY nodes

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Add nodes of USB2 physical layer for UniPhier SoC. This supports LD11.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Kunihiko Hayashi 2018-10-02 20:12:02 +09:00 committed by Masahiro Yamada
parent d7b9beb830
commit 546cba0623
1 changed files with 27 additions and 0 deletions
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27
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
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@ -454,6 +454,8 @@ usb0: usb@5a800100 {
<&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
phy-names = "usb";
phys = <&usb_phy0>;
has-transaction-translator;
};
@ -468,6 +470,8 @@ usb1: usb@5a810100 {
<&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
phy-names = "usb";
phys = <&usb_phy1>;
has-transaction-translator;
};
@ -482,6 +486,8 @@ usb2: usb@5a820100 {
<&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>;
phy-names = "usb";
phys = <&usb_phy2>;
has-transaction-translator;
};
@ -510,6 +516,27 @@ soc_glue: soc-glue@5f800000 {
pinctrl: pinctrl {
compatible = "socionext,uniphier-ld11-pinctrl";
};
usb-phy {
compatible = "socionext,uniphier-ld11-usb2-phy";
#address-cells = <1>;
#size-cells = <0>;
usb_phy0: phy@0 {
reg = <0>;
#phy-cells = <0>;
};
usb_phy1: phy@1 {
reg = <1>;
#phy-cells = <0>;
};
usb_phy2: phy@2 {
reg = <2>;
#phy-cells = <0>;
};
};
};
soc-glue@5f900000 {