mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 05:06:40 +07:00
OMAPDSS: DSI: wait for hsdiv clocks when enabling PLL
At the moment we have two functions to wait for the HSDIV clocks to get active, dsi_wait_pll_hsdiv_dispc_active and dsi_wait_pll_hsdiv_dsi_active. Instead of such inconvenient functions, let's just make sure that the hsdiv clocks are active after the pll has been enabled. This patch adds code to dsi_pll_set_clock_div() to wait until HSDIV clocks are active. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
parent
064c2a475d
commit
544bfb6832
@ -1514,6 +1514,20 @@ static void dsi_pll_calc_dsi_fck(struct dsi_clock_info *cinfo)
|
||||
cinfo->dsi_pll_hsdiv_dsi_clk = cinfo->clkin4ddr / cinfo->regm_dsi;
|
||||
}
|
||||
|
||||
static int dsi_wait_hsdiv_ack(struct platform_device *dsidev, u32 hsdiv_ack_mask)
|
||||
{
|
||||
int t = 100;
|
||||
|
||||
while (t-- > 0) {
|
||||
u32 v = dsi_read_reg(dsidev, DSI_PLL_STATUS);
|
||||
v &= hsdiv_ack_mask;
|
||||
if (v == hsdiv_ack_mask)
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
int dsi_pll_set_clock_div(struct platform_device *dsidev,
|
||||
struct dsi_clock_info *cinfo)
|
||||
{
|
||||
@ -1646,6 +1660,13 @@ int dsi_pll_set_clock_div(struct platform_device *dsidev,
|
||||
l = FLD_MOD(l, 0, 20, 20); /* DSI_HSDIVBYPASS */
|
||||
dsi_write_reg(dsidev, DSI_PLL_CONFIGURATION2, l);
|
||||
|
||||
r = dsi_wait_hsdiv_ack(dsidev, BIT(7) | BIT(8));
|
||||
if (r) {
|
||||
DSSERR("failed to enable HSDIV clocks: %d\n", r);
|
||||
goto err;
|
||||
}
|
||||
|
||||
|
||||
DSSDBG("PLL config done\n");
|
||||
err:
|
||||
return r;
|
||||
|
Loading…
Reference in New Issue
Block a user