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ARM: tegra: Use lower-case hexadecimal digits

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For consistency with other device tree content, use lower-case
hexadecimal digits in register region specifications.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2015-04-29 13:53:21 +02:00
parent b787f68c36
commit 5431b0fdad
3 changed files with 3 additions and 3 deletions
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2
Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt
View File

@ -29,7 +29,7 @@ Example:
fuse@7000f800 { fuse@7000f800 {
compatible = "nvidia,tegra20-efuse"; compatible = "nvidia,tegra20-efuse";
reg = <0x7000F800 0x400>, reg = <0x7000f800 0x400>,
<0x70000000 0x400>; <0x70000000 0x400>;
clocks = <&tegra_car TEGRA20_CLK_FUSE>; clocks = <&tegra_car TEGRA20_CLK_FUSE>;
clock-names = "fuse"; clock-names = "fuse";

2
arch/arm/boot/dts/tegra124.dtsi
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@ -300,7 +300,7 @@ apbdma: dma@0,60020000 {
apbmisc@0,70000800 { apbmisc@0,70000800 {
compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"; compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */
<0x0 0x7000E864 0x0 0x04>; /* Strapping options */ <0x0 0x7000e864 0x0 0x04>; /* Strapping options */
}; };
pinmux: pinmux@0,70000868 { pinmux: pinmux@0,70000868 {

2
arch/arm/boot/dts/tegra20.dtsi
View File

@ -563,7 +563,7 @@ memory-controller@7000f400 {
fuse@7000f800 { fuse@7000f800 {
compatible = "nvidia,tegra20-efuse"; compatible = "nvidia,tegra20-efuse";
reg = <0x7000F800 0x400>; reg = <0x7000f800 0x400>;
clocks = <&tegra_car TEGRA20_CLK_FUSE>; clocks = <&tegra_car TEGRA20_CLK_FUSE>;
clock-names = "fuse"; clock-names = "fuse";
resets = <&tegra_car 39>; resets = <&tegra_car 39>;