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drm/i915/chv: calculate rc6 residency correctly
The register to read cz count is different from vlv. Also the counts returned from CCK_CTL1 for BSW are (ticks in 30ns - 1). czcount_30ns of value 1 is a special case for 320Mhz. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80703 Suggested-by: Deepak S <deepak.s@linux.intel.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Tested-by: Guo Jinxian <jinxianx.guo@intel.com> Reviewed-by: Deepak S <deepak.s@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2281,7 +2281,7 @@ enum punit_power_well {
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/* Same as Haswell, but 72064 bytes now. */
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#define GEN8_CXT_TOTAL_SIZE (18 * PAGE_SIZE)
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#define CHV_CLK_CTL1 0x101100
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#define VLV_CLK_CTL2 0x101104
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#define CLK_CTL2_CZCOUNT_30NS_SHIFT 28
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@ -47,22 +47,45 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
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intel_runtime_pm_get(dev_priv);
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/* On VLV, residency time is in CZ units rather than 1.28us */
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/* On VLV and CHV, residency time is in CZ units rather than 1.28us */
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if (IS_VALLEYVIEW(dev)) {
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u32 clkctl2;
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u32 reg, czcount_30ns;
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clkctl2 = I915_READ(VLV_CLK_CTL2) >>
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CLK_CTL2_CZCOUNT_30NS_SHIFT;
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if (!clkctl2) {
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WARN(!clkctl2, "bogus CZ count value");
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if (IS_CHERRYVIEW(dev))
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reg = CHV_CLK_CTL1;
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else
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reg = VLV_CLK_CTL2;
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czcount_30ns = I915_READ(reg) >> CLK_CTL2_CZCOUNT_30NS_SHIFT;
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if (!czcount_30ns) {
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WARN(!czcount_30ns, "bogus CZ count value");
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ret = 0;
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goto out;
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}
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units = DIV_ROUND_UP_ULL(30ULL * bias, (u64)clkctl2);
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units = 0;
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div = 1000000ULL;
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if (IS_CHERRYVIEW(dev)) {
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/* Special case for 320Mhz */
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if (czcount_30ns == 1) {
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div = 10000000ULL;
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units = 3125ULL;
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} else {
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/* chv counts are one less */
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czcount_30ns += 1;
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}
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}
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if (units == 0)
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units = DIV_ROUND_UP_ULL(30ULL * bias,
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(u64)czcount_30ns);
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if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
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units <<= 8;
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div = 1000000ULL * bias;
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div = div * bias;
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}
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raw_time = I915_READ(reg) * units;
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