mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-18 11:16:42 +07:00
USB: EHCI whitespace fixes (cosmetic)
[ ... when you have an editor set to remind you of whitespace bugs ... ] Cosmetic EHCI changes: remove end-of-line whitespace, spaces before tabs. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
David Brownell
Greg Kroah-Hartman
parent
729ed6d502
commit
53bd6a601a
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 2001-2002 by David Brownell
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
@ -65,7 +65,7 @@ static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
|
||||
for (i = 0; i < HCS_N_PORTS (params); i++) {
|
||||
// FIXME MIPS won't readb() ...
|
||||
byte = readb (&ehci->caps->portroute[(i>>1)]);
|
||||
sprintf(tmp, "%d ",
|
||||
sprintf(tmp, "%d ",
|
||||
((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
|
||||
strcat(buf, tmp);
|
||||
}
|
||||
@ -141,12 +141,12 @@ dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
|
||||
}
|
||||
|
||||
static void __attribute__((__unused__))
|
||||
dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
|
||||
dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
|
||||
{
|
||||
ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
|
||||
label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb);
|
||||
ehci_dbg (ehci,
|
||||
" trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
" trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
le32_to_cpu(itd->hw_transaction[0]),
|
||||
le32_to_cpu(itd->hw_transaction[1]),
|
||||
le32_to_cpu(itd->hw_transaction[2]),
|
||||
@ -156,7 +156,7 @@ dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
|
||||
le32_to_cpu(itd->hw_transaction[6]),
|
||||
le32_to_cpu(itd->hw_transaction[7]));
|
||||
ehci_dbg (ehci,
|
||||
" buf: %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
" buf: %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
le32_to_cpu(itd->hw_bufp[0]),
|
||||
le32_to_cpu(itd->hw_bufp[1]),
|
||||
le32_to_cpu(itd->hw_bufp[2]),
|
||||
@ -171,12 +171,12 @@ dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
|
||||
}
|
||||
|
||||
static void __attribute__((__unused__))
|
||||
dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
|
||||
dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
|
||||
{
|
||||
ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
|
||||
label, sitd->frame, sitd, le32_to_cpu(sitd->hw_next), sitd->urb);
|
||||
ehci_dbg (ehci,
|
||||
" addr %08x sched %04x result %08x buf %08x %08x\n",
|
||||
" addr %08x sched %04x result %08x buf %08x %08x\n",
|
||||
le32_to_cpu(sitd->hw_fullspeed_ep),
|
||||
le32_to_cpu(sitd->hw_uframe),
|
||||
le32_to_cpu(sitd->hw_results),
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 2000-2004 by David Brownell
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
@ -70,7 +70,7 @@
|
||||
* 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
|
||||
* only scheduling is different, no arbitrary limitations.
|
||||
* 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
|
||||
* clean up HC run state handshaking.
|
||||
* clean up HC run state handshaking.
|
||||
* 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
|
||||
* 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
|
||||
* missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
|
||||
@ -425,7 +425,7 @@ static int ehci_init(struct usb_hcd *hcd)
|
||||
|
||||
/* controllers may cache some of the periodic schedule ... */
|
||||
hcc_params = readl(&ehci->caps->hcc_params);
|
||||
if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
|
||||
if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
|
||||
ehci->i_thresh = 8;
|
||||
else // N microframes cached
|
||||
ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (C) 2001-2004 by David Brownell
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
@ -103,10 +103,10 @@ static int ehci_bus_resume (struct usb_hcd *hcd)
|
||||
|
||||
/* re-init operational registers in case we lost power */
|
||||
if (readl (&ehci->regs->intr_enable) == 0) {
|
||||
/* at least some APM implementations will try to deliver
|
||||
/* at least some APM implementations will try to deliver
|
||||
* IRQs right away, so delay them until we're ready.
|
||||
*/
|
||||
intr_enable = 1;
|
||||
*/
|
||||
intr_enable = 1;
|
||||
writel (0, &ehci->regs->segment);
|
||||
writel (ehci->periodic_dma, &ehci->regs->frame_list);
|
||||
writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
|
||||
@ -232,7 +232,7 @@ ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
|
||||
buf [1] = 0;
|
||||
retval++;
|
||||
}
|
||||
|
||||
|
||||
/* no hub change reports (bit 0) for now (power, ...) */
|
||||
|
||||
/* port N changes (bit N)? */
|
||||
@ -304,7 +304,7 @@ ehci_hub_descriptor (
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
|
||||
#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
|
||||
|
||||
static int ehci_hub_control (
|
||||
struct usb_hcd *hcd,
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 2001 by David Brownell
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
@ -25,7 +25,7 @@
|
||||
* - data used only by the HCD ... kmalloc is fine
|
||||
* - async and periodic schedules, shared by HC and HCD ... these
|
||||
* need to use dma_pool or dma_alloc_coherent
|
||||
* - driver buffers, read/written by HC ... single shot DMA mapped
|
||||
* - driver buffers, read/written by HC ... single shot DMA mapped
|
||||
*
|
||||
* There's also PCI "register" data, which is memory mapped.
|
||||
* No memory seen by this driver is pageable.
|
||||
@ -119,7 +119,7 @@ static inline void qh_put (struct ehci_qh *qh)
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* The queue heads and transfer descriptors are managed from pools tied
|
||||
/* The queue heads and transfer descriptors are managed from pools tied
|
||||
* to each of the "per device" structures.
|
||||
* This is the initialisation and cleanup code.
|
||||
*/
|
||||
@ -165,7 +165,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
|
||||
int i;
|
||||
|
||||
/* QTDs for control/bulk/intr transfers */
|
||||
ehci->qtd_pool = dma_pool_create ("ehci_qtd",
|
||||
ehci->qtd_pool = dma_pool_create ("ehci_qtd",
|
||||
ehci_to_hcd(ehci)->self.controller,
|
||||
sizeof (struct ehci_qtd),
|
||||
32 /* byte alignment (for hw parts) */,
|
||||
@ -175,7 +175,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
|
||||
}
|
||||
|
||||
/* QHs for control/bulk/intr transfers */
|
||||
ehci->qh_pool = dma_pool_create ("ehci_qh",
|
||||
ehci->qh_pool = dma_pool_create ("ehci_qh",
|
||||
ehci_to_hcd(ehci)->self.controller,
|
||||
sizeof (struct ehci_qh),
|
||||
32 /* byte alignment (for hw parts) */,
|
||||
@ -189,7 +189,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
|
||||
}
|
||||
|
||||
/* ITD for high speed ISO transfers */
|
||||
ehci->itd_pool = dma_pool_create ("ehci_itd",
|
||||
ehci->itd_pool = dma_pool_create ("ehci_itd",
|
||||
ehci_to_hcd(ehci)->self.controller,
|
||||
sizeof (struct ehci_itd),
|
||||
32 /* byte alignment (for hw parts) */,
|
||||
@ -199,7 +199,7 @@ static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
|
||||
}
|
||||
|
||||
/* SITD for full/low speed split ISO transfers */
|
||||
ehci->sitd_pool = dma_pool_create ("ehci_sitd",
|
||||
ehci->sitd_pool = dma_pool_create ("ehci_sitd",
|
||||
ehci_to_hcd(ehci)->self.controller,
|
||||
sizeof (struct ehci_sitd),
|
||||
32 /* byte alignment (for hw parts) */,
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (C) 2001-2004 by David Brownell
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
@ -31,7 +31,7 @@
|
||||
* ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
|
||||
* interrupts) needs careful scheduling. Performance improvements can be
|
||||
* an ongoing challenge. That's in "ehci-sched.c".
|
||||
*
|
||||
*
|
||||
* USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
|
||||
* or otherwise through transaction translators (TTs) in USB 2.0 hubs using
|
||||
* (b) special fields in qh entries or (c) split iso entries. TTs will
|
||||
@ -199,7 +199,7 @@ static void qtd_copy_status (
|
||||
&& ((token & QTD_STS_MMF) != 0
|
||||
|| QTD_CERR(token) == 0)
|
||||
&& (!ehci_is_TDI(ehci)
|
||||
|| urb->dev->tt->hub !=
|
||||
|| urb->dev->tt->hub !=
|
||||
ehci_to_hcd(ehci)->self.root_hub)) {
|
||||
#ifdef DEBUG
|
||||
struct usb_device *tt = urb->dev->tt->hub;
|
||||
@ -364,7 +364,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh, struct pt_regs *regs)
|
||||
*/
|
||||
if (likely (urb->status == -EINPROGRESS))
|
||||
continue;
|
||||
|
||||
|
||||
/* issue status after short control reads */
|
||||
if (unlikely (do_status != 0)
|
||||
&& QTD_PID (token) == 0 /* OUT */) {
|
||||
@ -388,7 +388,7 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh, struct pt_regs *regs)
|
||||
wmb ();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* remove it from the queue */
|
||||
spin_lock (&urb->lock);
|
||||
qtd_copy_status (ehci, urb, qtd->length, token);
|
||||
@ -518,7 +518,7 @@ qh_urb_transaction (
|
||||
/* for zero length DATA stages, STATUS is always IN */
|
||||
if (len == 0)
|
||||
token |= (1 /* "in" */ << 8);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* data transfer stage: buffer setup
|
||||
@ -759,7 +759,7 @@ qh_make (
|
||||
}
|
||||
break;
|
||||
default:
|
||||
dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
|
||||
dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
|
||||
done:
|
||||
qh_put (qh);
|
||||
return NULL;
|
||||
@ -972,7 +972,7 @@ static void end_unlink_async (struct ehci_hcd *ehci, struct pt_regs *regs)
|
||||
// qh->hw_next = cpu_to_le32 (qh->qh_dma);
|
||||
qh->qh_state = QH_STATE_IDLE;
|
||||
qh->qh_next.qh = NULL;
|
||||
qh_put (qh); // refcount from reclaim
|
||||
qh_put (qh); // refcount from reclaim
|
||||
|
||||
/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
|
||||
next = qh->reclaim;
|
||||
@ -1031,7 +1031,7 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
|
||||
timer_action_done (ehci, TIMER_ASYNC_OFF);
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
qh->qh_state = QH_STATE_UNLINK;
|
||||
ehci->reclaim = qh = qh_get (qh);
|
||||
@ -1046,7 +1046,7 @@ static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
|
||||
|
||||
if (unlikely (ehci_to_hcd(ehci)->state == HC_STATE_HALT)) {
|
||||
/* if (unlikely (qh->reclaim != 0))
|
||||
* this will recurse, probably not much
|
||||
* this will recurse, probably not much
|
||||
*/
|
||||
end_unlink_async (ehci, NULL);
|
||||
return;
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
/*
|
||||
* Copyright (c) 2001-2004 by David Brownell
|
||||
* Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
@ -613,7 +613,7 @@ static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
static int check_period (
|
||||
struct ehci_hcd *ehci,
|
||||
struct ehci_hcd *ehci,
|
||||
unsigned frame,
|
||||
unsigned uframe,
|
||||
unsigned period,
|
||||
@ -629,7 +629,7 @@ static int check_period (
|
||||
|
||||
/*
|
||||
* 80% periodic == 100 usec/uframe available
|
||||
* convert "usecs we need" to "max already claimed"
|
||||
* convert "usecs we need" to "max already claimed"
|
||||
*/
|
||||
usecs = 100 - usecs;
|
||||
|
||||
@ -659,14 +659,14 @@ static int check_period (
|
||||
}
|
||||
|
||||
static int check_intr_schedule (
|
||||
struct ehci_hcd *ehci,
|
||||
struct ehci_hcd *ehci,
|
||||
unsigned frame,
|
||||
unsigned uframe,
|
||||
const struct ehci_qh *qh,
|
||||
__le32 *c_maskp
|
||||
)
|
||||
{
|
||||
int retval = -ENOSPC;
|
||||
int retval = -ENOSPC;
|
||||
u8 mask = 0;
|
||||
|
||||
if (qh->c_usecs && uframe >= 6) /* FSTN territory? */
|
||||
@ -701,7 +701,7 @@ static int check_intr_schedule (
|
||||
/* Make sure this tt's buffer is also available for CSPLITs.
|
||||
* We pessimize a bit; probably the typical full speed case
|
||||
* doesn't need the second CSPLIT.
|
||||
*
|
||||
*
|
||||
* NOTE: both SPLIT and CSPLIT could be checked in just
|
||||
* one smart pass...
|
||||
*/
|
||||
@ -728,7 +728,7 @@ static int check_intr_schedule (
|
||||
*/
|
||||
static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
|
||||
{
|
||||
int status;
|
||||
int status;
|
||||
unsigned uframe;
|
||||
__le32 c_mask;
|
||||
unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
|
||||
@ -784,7 +784,7 @@ static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
|
||||
ehci_dbg (ehci, "reused qh %p schedule\n", qh);
|
||||
|
||||
/* stuff into the periodic schedule */
|
||||
status = qh_link_periodic (ehci, qh);
|
||||
status = qh_link_periodic (ehci, qh);
|
||||
done:
|
||||
return status;
|
||||
}
|
||||
@ -1681,7 +1681,7 @@ static int itd_submit (struct ehci_hcd *ehci, struct urb *urb,
|
||||
status = -ESHUTDOWN;
|
||||
else
|
||||
status = iso_stream_schedule (ehci, urb, stream);
|
||||
if (likely (status == 0))
|
||||
if (likely (status == 0))
|
||||
itd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
|
||||
spin_unlock_irqrestore (&ehci->lock, flags);
|
||||
|
||||
@ -1738,7 +1738,7 @@ sitd_sched_init (
|
||||
if (packet->buf1 != (buf & ~(u64)0x0fff))
|
||||
packet->cross = 1;
|
||||
|
||||
/* OUT uses multiple start-splits */
|
||||
/* OUT uses multiple start-splits */
|
||||
if (stream->bEndpointAddress & USB_DIR_IN)
|
||||
continue;
|
||||
length = (length + 187) / 188;
|
||||
@ -1925,7 +1925,7 @@ sitd_link_urb (
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
#define SITD_ERRS (SITD_STS_ERR | SITD_STS_DBE | SITD_STS_BABBLE \
|
||||
| SITD_STS_XACT | SITD_STS_MMF)
|
||||
| SITD_STS_XACT | SITD_STS_MMF)
|
||||
|
||||
static unsigned
|
||||
sitd_complete (
|
||||
@ -2043,7 +2043,7 @@ static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb,
|
||||
status = -ESHUTDOWN;
|
||||
else
|
||||
status = iso_stream_schedule (ehci, urb, stream);
|
||||
if (status == 0)
|
||||
if (status == 0)
|
||||
sitd_link_urb (ehci, urb, ehci->periodic_size << 3, stream);
|
||||
spin_unlock_irqrestore (&ehci->lock, flags);
|
||||
|
||||
@ -2226,5 +2226,5 @@ scan_periodic (struct ehci_hcd *ehci, struct pt_regs *regs)
|
||||
now_uframe++;
|
||||
now_uframe %= mod;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/*
|
||||
* Copyright (c) 2001-2002 by David Brownell
|
||||
*
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
@ -103,7 +103,7 @@ struct ehci_hcd { /* one per controller */
|
||||
#endif
|
||||
};
|
||||
|
||||
/* convert between an HCD pointer and the corresponding EHCI_HCD */
|
||||
/* convert between an HCD pointer and the corresponding EHCI_HCD */
|
||||
static inline struct ehci_hcd *hcd_to_ehci (struct usb_hcd *hcd)
|
||||
{
|
||||
return (struct ehci_hcd *) (hcd->hcd_priv);
|
||||
@ -178,8 +178,8 @@ struct ehci_caps {
|
||||
#define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
|
||||
#define HCS_N_CC(p) (((p)>>12)&0xf) /* bits 15:12, #companion HCs */
|
||||
#define HCS_N_PCC(p) (((p)>>8)&0xf) /* bits 11:8, ports per CC */
|
||||
#define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */
|
||||
#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
|
||||
#define HCS_PORTROUTED(p) ((p)&(1 << 7)) /* true: port routing */
|
||||
#define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
|
||||
#define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
|
||||
|
||||
u32 hcc_params; /* HCCPARAMS - offset 0x8 */
|
||||
@ -204,7 +204,7 @@ struct ehci_regs {
|
||||
#define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
|
||||
#define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */
|
||||
#define CMD_ASE (1<<5) /* async schedule enable */
|
||||
#define CMD_PSE (1<<4) /* periodic schedule enable */
|
||||
#define CMD_PSE (1<<4) /* periodic schedule enable */
|
||||
/* 3:2 is periodic frame list size */
|
||||
#define CMD_RESET (1<<1) /* reset HC not bus */
|
||||
#define CMD_RUN (1<<0) /* start/stop HC */
|
||||
@ -230,9 +230,9 @@ struct ehci_regs {
|
||||
/* FRINDEX: offset 0x0C */
|
||||
u32 frame_index; /* current microframe number */
|
||||
/* CTRLDSSEGMENT: offset 0x10 */
|
||||
u32 segment; /* address bits 63:32 if needed */
|
||||
u32 segment; /* address bits 63:32 if needed */
|
||||
/* PERIODICLISTBASE: offset 0x14 */
|
||||
u32 frame_list; /* points to periodic list */
|
||||
u32 frame_list; /* points to periodic list */
|
||||
/* ASYNCLISTADDR: offset 0x18 */
|
||||
u32 async_next; /* address of next async queue head */
|
||||
|
||||
@ -301,7 +301,7 @@ struct ehci_dbg_port {
|
||||
|
||||
/*
|
||||
* EHCI Specification 0.95 Section 3.5
|
||||
* QTD: describe data transfer components (buffer, direction, ...)
|
||||
* QTD: describe data transfer components (buffer, direction, ...)
|
||||
* See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".
|
||||
*
|
||||
* These are associated only with "QH" (Queue Head) structures,
|
||||
@ -311,7 +311,7 @@ struct ehci_qtd {
|
||||
/* first part defined by EHCI spec */
|
||||
__le32 hw_next; /* see EHCI 3.5.1 */
|
||||
__le32 hw_alt_next; /* see EHCI 3.5.2 */
|
||||
__le32 hw_token; /* see EHCI 3.5.3 */
|
||||
__le32 hw_token; /* see EHCI 3.5.3 */
|
||||
#define QTD_TOGGLE (1 << 31) /* data toggle */
|
||||
#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
|
||||
#define QTD_IOC (1 << 15) /* interrupt on complete */
|
||||
@ -348,8 +348,8 @@ struct ehci_qtd {
|
||||
/* values for that type tag */
|
||||
#define Q_TYPE_ITD __constant_cpu_to_le32 (0 << 1)
|
||||
#define Q_TYPE_QH __constant_cpu_to_le32 (1 << 1)
|
||||
#define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1)
|
||||
#define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1)
|
||||
#define Q_TYPE_SITD __constant_cpu_to_le32 (2 << 1)
|
||||
#define Q_TYPE_FSTN __constant_cpu_to_le32 (3 << 1)
|
||||
|
||||
/* next async queue entry, or pointer to interrupt/periodic QH */
|
||||
#define QH_NEXT(dma) (cpu_to_le32(((u32)dma)&~0x01f)|Q_TYPE_QH)
|
||||
@ -366,7 +366,7 @@ struct ehci_qtd {
|
||||
* For entries in the async schedule, the type tag always says "qh".
|
||||
*/
|
||||
union ehci_shadow {
|
||||
struct ehci_qh *qh; /* Q_TYPE_QH */
|
||||
struct ehci_qh *qh; /* Q_TYPE_QH */
|
||||
struct ehci_itd *itd; /* Q_TYPE_ITD */
|
||||
struct ehci_sitd *sitd; /* Q_TYPE_SITD */
|
||||
struct ehci_fstn *fstn; /* Q_TYPE_FSTN */
|
||||
@ -396,7 +396,7 @@ struct ehci_qh {
|
||||
#define QH_HUBPORT 0x3f800000
|
||||
#define QH_MULT 0xc0000000
|
||||
__le32 hw_current; /* qtd list - see EHCI 3.6.4 */
|
||||
|
||||
|
||||
/* qtd overlay (hardware parts of a struct ehci_qtd) */
|
||||
__le32 hw_qtd_next;
|
||||
__le32 hw_alt_next;
|
||||
@ -471,7 +471,7 @@ struct ehci_iso_stream {
|
||||
struct list_head td_list; /* queued itds/sitds */
|
||||
struct list_head free_list; /* list of unused itds/sitds */
|
||||
struct usb_device *udev;
|
||||
struct usb_host_endpoint *ep;
|
||||
struct usb_host_endpoint *ep;
|
||||
|
||||
/* output of (re)scheduling */
|
||||
unsigned long start; /* jiffies */
|
||||
@ -491,8 +491,8 @@ struct ehci_iso_stream {
|
||||
unsigned bandwidth;
|
||||
|
||||
/* This is used to initialize iTD's hw_bufp fields */
|
||||
__le32 buf0;
|
||||
__le32 buf1;
|
||||
__le32 buf0;
|
||||
__le32 buf1;
|
||||
__le32 buf2;
|
||||
|
||||
/* this is used to initialize sITD's tt info */
|
||||
@ -520,7 +520,7 @@ struct ehci_itd {
|
||||
|
||||
#define ITD_ACTIVE __constant_cpu_to_le32(EHCI_ISOC_ACTIVE)
|
||||
|
||||
__le32 hw_bufp [7]; /* see EHCI 3.3.3 */
|
||||
__le32 hw_bufp [7]; /* see EHCI 3.3.3 */
|
||||
__le32 hw_bufp_hi [7]; /* Appendix B */
|
||||
|
||||
/* the rest is HCD-private */
|
||||
@ -541,7 +541,7 @@ struct ehci_itd {
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* EHCI Specification 0.95 Section 3.4
|
||||
* EHCI Specification 0.95 Section 3.4
|
||||
* siTD, aka split-transaction isochronous Transfer Descriptor
|
||||
* ... describe full speed iso xfers through TT in hubs
|
||||
* see Figure 3-5 "Split-transaction Isochronous Transaction Descriptor (siTD)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user