mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 12:32:00 +07:00
wireless: use ARRAY_SIZE
Using the ARRAY_SIZE macro improves the readability of the code. Also, it is not always useful to use a variable to store this constant calculated at compile time. Found with Coccinelle with the following semantic patch: @r depends on (org || report)@ type T; T[] E; position p; @@ ( (sizeof(E)@p /sizeof(*E)) | (sizeof(E)@p /sizeof(E[...])) | (sizeof(E)@p /sizeof(T)) ) Signed-off-by: Jérémy Lefaure <jeremy.lefaure@lse.epita.fr> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Jérémy Lefaure
Kalle Valo
parent
59365b9efd
commit
53ac793593
@ -14,6 +14,7 @@
|
||||
* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <types.h>
|
||||
#include "phytbl_n.h"
|
||||
|
||||
@ -4437,109 +4438,39 @@ static const u16 loft_lut_core1_rev0[] = {
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev0_volatile[] = {
|
||||
{&bdi_tbl_rev0, sizeof(bdi_tbl_rev0) / sizeof(bdi_tbl_rev0[0]), 21, 0,
|
||||
16}
|
||||
,
|
||||
{&pltlut_tbl_rev0, sizeof(pltlut_tbl_rev0) / sizeof(pltlut_tbl_rev0[0]),
|
||||
20, 0, 32}
|
||||
,
|
||||
{&gainctrl_lut_core0_rev0,
|
||||
sizeof(gainctrl_lut_core0_rev0) / sizeof(gainctrl_lut_core0_rev0[0]),
|
||||
26, 192, 32}
|
||||
,
|
||||
{&gainctrl_lut_core1_rev0,
|
||||
sizeof(gainctrl_lut_core1_rev0) / sizeof(gainctrl_lut_core1_rev0[0]),
|
||||
27, 192, 32}
|
||||
,
|
||||
|
||||
{&est_pwr_lut_core0_rev0,
|
||||
sizeof(est_pwr_lut_core0_rev0) / sizeof(est_pwr_lut_core0_rev0[0]), 26,
|
||||
0, 8}
|
||||
,
|
||||
{&est_pwr_lut_core1_rev0,
|
||||
sizeof(est_pwr_lut_core1_rev0) / sizeof(est_pwr_lut_core1_rev0[0]), 27,
|
||||
0, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core0_rev0,
|
||||
sizeof(adj_pwr_lut_core0_rev0) / sizeof(adj_pwr_lut_core0_rev0[0]), 26,
|
||||
64, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core1_rev0,
|
||||
sizeof(adj_pwr_lut_core1_rev0) / sizeof(adj_pwr_lut_core1_rev0[0]), 27,
|
||||
64, 8}
|
||||
,
|
||||
{&iq_lut_core0_rev0,
|
||||
sizeof(iq_lut_core0_rev0) / sizeof(iq_lut_core0_rev0[0]), 26, 320, 32}
|
||||
,
|
||||
{&iq_lut_core1_rev0,
|
||||
sizeof(iq_lut_core1_rev0) / sizeof(iq_lut_core1_rev0[0]), 27, 320, 32}
|
||||
,
|
||||
{&loft_lut_core0_rev0,
|
||||
sizeof(loft_lut_core0_rev0) / sizeof(loft_lut_core0_rev0[0]), 26, 448,
|
||||
16}
|
||||
,
|
||||
{&loft_lut_core1_rev0,
|
||||
sizeof(loft_lut_core1_rev0) / sizeof(loft_lut_core1_rev0[0]), 27, 448,
|
||||
16}
|
||||
,
|
||||
{&bdi_tbl_rev0, ARRAY_SIZE(bdi_tbl_rev0), 21, 0, 16},
|
||||
{&pltlut_tbl_rev0, ARRAY_SIZE(pltlut_tbl_rev0), 20, 0, 32},
|
||||
{&gainctrl_lut_core0_rev0, ARRAY_SIZE(gainctrl_lut_core0_rev0), 26, 192, 32},
|
||||
{&gainctrl_lut_core1_rev0, ARRAY_SIZE(gainctrl_lut_core1_rev0), 27, 192, 32},
|
||||
{&est_pwr_lut_core0_rev0, ARRAY_SIZE(est_pwr_lut_core0_rev0), 26, 0, 8},
|
||||
{&est_pwr_lut_core1_rev0, ARRAY_SIZE(est_pwr_lut_core1_rev0), 27, 0, 8},
|
||||
{&adj_pwr_lut_core0_rev0, ARRAY_SIZE(adj_pwr_lut_core0_rev0), 26, 64, 8},
|
||||
{&adj_pwr_lut_core1_rev0, ARRAY_SIZE(adj_pwr_lut_core1_rev0), 27, 64, 8},
|
||||
{&iq_lut_core0_rev0, ARRAY_SIZE(iq_lut_core0_rev0), 26, 320, 32},
|
||||
{&iq_lut_core1_rev0, ARRAY_SIZE(iq_lut_core1_rev0), 27, 320, 32},
|
||||
{&loft_lut_core0_rev0, ARRAY_SIZE(loft_lut_core0_rev0), 26, 448, 16},
|
||||
{&loft_lut_core1_rev0, ARRAY_SIZE(loft_lut_core1_rev0), 27, 448, 16},
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev0[] = {
|
||||
{&frame_struct_rev0,
|
||||
sizeof(frame_struct_rev0) / sizeof(frame_struct_rev0[0]), 10, 0, 32}
|
||||
,
|
||||
{&frame_lut_rev0, sizeof(frame_lut_rev0) / sizeof(frame_lut_rev0[0]),
|
||||
24, 0, 8}
|
||||
,
|
||||
{&tmap_tbl_rev0, sizeof(tmap_tbl_rev0) / sizeof(tmap_tbl_rev0[0]), 12,
|
||||
0, 32}
|
||||
,
|
||||
{&tdtrn_tbl_rev0, sizeof(tdtrn_tbl_rev0) / sizeof(tdtrn_tbl_rev0[0]),
|
||||
14, 0, 32}
|
||||
,
|
||||
{&intlv_tbl_rev0, sizeof(intlv_tbl_rev0) / sizeof(intlv_tbl_rev0[0]),
|
||||
13, 0, 32}
|
||||
,
|
||||
{&pilot_tbl_rev0, sizeof(pilot_tbl_rev0) / sizeof(pilot_tbl_rev0[0]),
|
||||
11, 0, 16}
|
||||
,
|
||||
{&tdi_tbl20_ant0_rev0,
|
||||
sizeof(tdi_tbl20_ant0_rev0) / sizeof(tdi_tbl20_ant0_rev0[0]), 19, 128,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl20_ant1_rev0,
|
||||
sizeof(tdi_tbl20_ant1_rev0) / sizeof(tdi_tbl20_ant1_rev0[0]), 19, 256,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl40_ant0_rev0,
|
||||
sizeof(tdi_tbl40_ant0_rev0) / sizeof(tdi_tbl40_ant0_rev0[0]), 19, 640,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl40_ant1_rev0,
|
||||
sizeof(tdi_tbl40_ant1_rev0) / sizeof(tdi_tbl40_ant1_rev0[0]), 19, 768,
|
||||
32}
|
||||
,
|
||||
{&chanest_tbl_rev0,
|
||||
sizeof(chanest_tbl_rev0) / sizeof(chanest_tbl_rev0[0]), 22, 0, 32}
|
||||
,
|
||||
{&mcs_tbl_rev0, sizeof(mcs_tbl_rev0) / sizeof(mcs_tbl_rev0[0]), 18, 0,
|
||||
8}
|
||||
,
|
||||
{&noise_var_tbl0_rev0,
|
||||
sizeof(noise_var_tbl0_rev0) / sizeof(noise_var_tbl0_rev0[0]), 16, 0,
|
||||
32}
|
||||
,
|
||||
{&noise_var_tbl1_rev0,
|
||||
sizeof(noise_var_tbl1_rev0) / sizeof(noise_var_tbl1_rev0[0]), 16, 128,
|
||||
32}
|
||||
,
|
||||
{&frame_struct_rev0, ARRAY_SIZE(frame_struct_rev0), 10, 0, 32},
|
||||
{&frame_lut_rev0, ARRAY_SIZE(frame_lut_rev0), 24, 0, 8},
|
||||
{&tmap_tbl_rev0, ARRAY_SIZE(tmap_tbl_rev0), 12, 0, 32},
|
||||
{&tdtrn_tbl_rev0, ARRAY_SIZE(tdtrn_tbl_rev0), 14, 0, 32},
|
||||
{&intlv_tbl_rev0, ARRAY_SIZE(intlv_tbl_rev0), 13, 0, 32},
|
||||
{&pilot_tbl_rev0, ARRAY_SIZE(pilot_tbl_rev0), 11, 0, 16},
|
||||
{&tdi_tbl20_ant0_rev0, ARRAY_SIZE(tdi_tbl20_ant0_rev0), 19, 128, 32},
|
||||
{&tdi_tbl20_ant1_rev0, ARRAY_SIZE(tdi_tbl20_ant1_rev0), 19, 256, 32},
|
||||
{&tdi_tbl40_ant0_rev0, ARRAY_SIZE(tdi_tbl40_ant0_rev0), 19, 640, 32},
|
||||
{&tdi_tbl40_ant1_rev0, ARRAY_SIZE(tdi_tbl40_ant1_rev0), 19, 768, 32},
|
||||
{&chanest_tbl_rev0, ARRAY_SIZE(chanest_tbl_rev0), 22, 0, 32},
|
||||
{&mcs_tbl_rev0, ARRAY_SIZE(mcs_tbl_rev0), 18, 0, 8},
|
||||
{&noise_var_tbl0_rev0, ARRAY_SIZE(noise_var_tbl0_rev0), 16, 0, 32},
|
||||
{&noise_var_tbl1_rev0, ARRAY_SIZE(noise_var_tbl1_rev0), 16, 128, 32},
|
||||
};
|
||||
|
||||
const u32 mimophytbl_info_sz_rev0 =
|
||||
sizeof(mimophytbl_info_rev0) / sizeof(mimophytbl_info_rev0[0]);
|
||||
const u32 mimophytbl_info_sz_rev0_volatile =
|
||||
sizeof(mimophytbl_info_rev0_volatile) /
|
||||
sizeof(mimophytbl_info_rev0_volatile[0]);
|
||||
const u32 mimophytbl_info_sz_rev0 = ARRAY_SIZE(mimophytbl_info_rev0);
|
||||
const u32 mimophytbl_info_sz_rev0_volatile = ARRAY_SIZE(mimophytbl_info_rev0_volatile);
|
||||
|
||||
static const u16 ant_swctrl_tbl_rev3[] = {
|
||||
0x0082,
|
||||
@ -9363,132 +9294,53 @@ static const u32 papd_cal_scalars_tbl_core1_rev3[] = {
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev3_volatile[] = {
|
||||
{&ant_swctrl_tbl_rev3,
|
||||
sizeof(ant_swctrl_tbl_rev3) / sizeof(ant_swctrl_tbl_rev3[0]), 9, 0, 16}
|
||||
,
|
||||
{&ant_swctrl_tbl_rev3, ARRAY_SIZE(ant_swctrl_tbl_rev3), 9, 0, 16},
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev3_volatile1[] = {
|
||||
{&ant_swctrl_tbl_rev3_1,
|
||||
sizeof(ant_swctrl_tbl_rev3_1) / sizeof(ant_swctrl_tbl_rev3_1[0]), 9, 0,
|
||||
16}
|
||||
,
|
||||
{&ant_swctrl_tbl_rev3_1, ARRAY_SIZE(ant_swctrl_tbl_rev3_1), 9, 0, 16},
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev3_volatile2[] = {
|
||||
{&ant_swctrl_tbl_rev3_2,
|
||||
sizeof(ant_swctrl_tbl_rev3_2) / sizeof(ant_swctrl_tbl_rev3_2[0]), 9, 0,
|
||||
16}
|
||||
,
|
||||
{&ant_swctrl_tbl_rev3_2, ARRAY_SIZE(ant_swctrl_tbl_rev3_2), 9, 0, 16},
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev3_volatile3[] = {
|
||||
{&ant_swctrl_tbl_rev3_3,
|
||||
sizeof(ant_swctrl_tbl_rev3_3) / sizeof(ant_swctrl_tbl_rev3_3[0]), 9, 0,
|
||||
16}
|
||||
,
|
||||
{&ant_swctrl_tbl_rev3_3, ARRAY_SIZE(ant_swctrl_tbl_rev3_3), 9, 0, 16},
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev3[] = {
|
||||
{&frame_struct_rev3,
|
||||
sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32}
|
||||
,
|
||||
{&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]),
|
||||
11, 0, 16}
|
||||
,
|
||||
{&tmap_tbl_rev3, sizeof(tmap_tbl_rev3) / sizeof(tmap_tbl_rev3[0]), 12,
|
||||
0, 32}
|
||||
,
|
||||
{&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]),
|
||||
13, 0, 32}
|
||||
,
|
||||
{&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]),
|
||||
14, 0, 32}
|
||||
,
|
||||
{&noise_var_tbl_rev3,
|
||||
sizeof(noise_var_tbl_rev3) / sizeof(noise_var_tbl_rev3[0]), 16, 0, 32}
|
||||
,
|
||||
{&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0,
|
||||
16}
|
||||
,
|
||||
{&tdi_tbl20_ant0_rev3,
|
||||
sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl20_ant1_rev3,
|
||||
sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl40_ant0_rev3,
|
||||
sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl40_ant1_rev3,
|
||||
sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768,
|
||||
32}
|
||||
,
|
||||
{&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]),
|
||||
20, 0, 32}
|
||||
,
|
||||
{&chanest_tbl_rev3,
|
||||
sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32}
|
||||
,
|
||||
{&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]),
|
||||
24, 0, 8}
|
||||
,
|
||||
{&est_pwr_lut_core0_rev3,
|
||||
sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26,
|
||||
0, 8}
|
||||
,
|
||||
{&est_pwr_lut_core1_rev3,
|
||||
sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27,
|
||||
0, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core0_rev3,
|
||||
sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26,
|
||||
64, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core1_rev3,
|
||||
sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27,
|
||||
64, 8}
|
||||
,
|
||||
{&gainctrl_lut_core0_rev3,
|
||||
sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]),
|
||||
26, 192, 32}
|
||||
,
|
||||
{&gainctrl_lut_core1_rev3,
|
||||
sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]),
|
||||
27, 192, 32}
|
||||
,
|
||||
{&iq_lut_core0_rev3,
|
||||
sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32}
|
||||
,
|
||||
{&iq_lut_core1_rev3,
|
||||
sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32}
|
||||
,
|
||||
{&loft_lut_core0_rev3,
|
||||
sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448,
|
||||
16}
|
||||
,
|
||||
{&loft_lut_core1_rev3,
|
||||
sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448,
|
||||
16}
|
||||
{&frame_struct_rev3, ARRAY_SIZE(frame_struct_rev3), 10, 0, 32},
|
||||
{&pilot_tbl_rev3, ARRAY_SIZE(pilot_tbl_rev3), 11, 0, 16},
|
||||
{&tmap_tbl_rev3, ARRAY_SIZE(tmap_tbl_rev3), 12, 0, 32},
|
||||
{&intlv_tbl_rev3, ARRAY_SIZE(intlv_tbl_rev3), 13, 0, 32},
|
||||
{&tdtrn_tbl_rev3, ARRAY_SIZE(tdtrn_tbl_rev3), 14, 0, 32},
|
||||
{&noise_var_tbl_rev3, ARRAY_SIZE(noise_var_tbl_rev3), 16, 0, 32},
|
||||
{&mcs_tbl_rev3, ARRAY_SIZE(mcs_tbl_rev3), 18, 0, 16},
|
||||
{&tdi_tbl20_ant0_rev3, ARRAY_SIZE(tdi_tbl20_ant0_rev3), 19, 128, 32},
|
||||
{&tdi_tbl20_ant1_rev3, ARRAY_SIZE(tdi_tbl20_ant1_rev3), 19, 256, 32},
|
||||
{&tdi_tbl40_ant0_rev3, ARRAY_SIZE(tdi_tbl40_ant0_rev3), 19, 640, 32},
|
||||
{&tdi_tbl40_ant1_rev3, ARRAY_SIZE(tdi_tbl40_ant1_rev3), 19, 768, 32},
|
||||
{&pltlut_tbl_rev3, ARRAY_SIZE(pltlut_tbl_rev3), 20, 0, 32},
|
||||
{&chanest_tbl_rev3, ARRAY_SIZE(chanest_tbl_rev3), 22, 0, 32},
|
||||
{&frame_lut_rev3, ARRAY_SIZE(frame_lut_rev3), 24, 0, 8},
|
||||
{&est_pwr_lut_core0_rev3, ARRAY_SIZE(est_pwr_lut_core0_rev3), 26, 0, 8},
|
||||
{&est_pwr_lut_core1_rev3, ARRAY_SIZE(est_pwr_lut_core1_rev3), 27, 0, 8},
|
||||
{&adj_pwr_lut_core0_rev3, ARRAY_SIZE(adj_pwr_lut_core0_rev3), 26, 64, 8},
|
||||
{&adj_pwr_lut_core1_rev3, ARRAY_SIZE(adj_pwr_lut_core1_rev3), 27, 64, 8},
|
||||
{&gainctrl_lut_core0_rev3, ARRAY_SIZE(gainctrl_lut_core0_rev3), 26, 192, 32},
|
||||
{&gainctrl_lut_core1_rev3, ARRAY_SIZE(gainctrl_lut_core1_rev3), 27, 192, 32},
|
||||
{&iq_lut_core0_rev3, ARRAY_SIZE(iq_lut_core0_rev3), 26, 320, 32},
|
||||
{&iq_lut_core1_rev3, ARRAY_SIZE(iq_lut_core1_rev3), 27, 320, 32},
|
||||
{&loft_lut_core0_rev3, ARRAY_SIZE(loft_lut_core0_rev3), 26, 448, 16},
|
||||
{&loft_lut_core1_rev3, ARRAY_SIZE(loft_lut_core1_rev3), 27, 448, 16}
|
||||
};
|
||||
|
||||
const u32 mimophytbl_info_sz_rev3 =
|
||||
sizeof(mimophytbl_info_rev3) / sizeof(mimophytbl_info_rev3[0]);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile =
|
||||
sizeof(mimophytbl_info_rev3_volatile) /
|
||||
sizeof(mimophytbl_info_rev3_volatile[0]);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile1 =
|
||||
sizeof(mimophytbl_info_rev3_volatile1) /
|
||||
sizeof(mimophytbl_info_rev3_volatile1[0]);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile2 =
|
||||
sizeof(mimophytbl_info_rev3_volatile2) /
|
||||
sizeof(mimophytbl_info_rev3_volatile2[0]);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile3 =
|
||||
sizeof(mimophytbl_info_rev3_volatile3) /
|
||||
sizeof(mimophytbl_info_rev3_volatile3[0]);
|
||||
const u32 mimophytbl_info_sz_rev3 = ARRAY_SIZE(mimophytbl_info_rev3);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile = ARRAY_SIZE(mimophytbl_info_rev3_volatile);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile1 = ARRAY_SIZE(mimophytbl_info_rev3_volatile1);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile2 = ARRAY_SIZE(mimophytbl_info_rev3_volatile2);
|
||||
const u32 mimophytbl_info_sz_rev3_volatile3 = ARRAY_SIZE(mimophytbl_info_rev3_volatile3);
|
||||
|
||||
static const u32 tmap_tbl_rev7[] = {
|
||||
0x8a88aa80,
|
||||
@ -10469,162 +10321,58 @@ static const u32 papd_cal_scalars_tbl_core1_rev7[] = {
|
||||
};
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev7[] = {
|
||||
{&frame_struct_rev3,
|
||||
sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32}
|
||||
,
|
||||
{&pilot_tbl_rev3, sizeof(pilot_tbl_rev3) / sizeof(pilot_tbl_rev3[0]),
|
||||
11, 0, 16}
|
||||
,
|
||||
{&tmap_tbl_rev7, sizeof(tmap_tbl_rev7) / sizeof(tmap_tbl_rev7[0]), 12,
|
||||
0, 32}
|
||||
,
|
||||
{&intlv_tbl_rev3, sizeof(intlv_tbl_rev3) / sizeof(intlv_tbl_rev3[0]),
|
||||
13, 0, 32}
|
||||
,
|
||||
{&tdtrn_tbl_rev3, sizeof(tdtrn_tbl_rev3) / sizeof(tdtrn_tbl_rev3[0]),
|
||||
14, 0, 32}
|
||||
,
|
||||
{&noise_var_tbl_rev7,
|
||||
sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32}
|
||||
,
|
||||
{&mcs_tbl_rev3, sizeof(mcs_tbl_rev3) / sizeof(mcs_tbl_rev3[0]), 18, 0,
|
||||
16}
|
||||
,
|
||||
{&tdi_tbl20_ant0_rev3,
|
||||
sizeof(tdi_tbl20_ant0_rev3) / sizeof(tdi_tbl20_ant0_rev3[0]), 19, 128,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl20_ant1_rev3,
|
||||
sizeof(tdi_tbl20_ant1_rev3) / sizeof(tdi_tbl20_ant1_rev3[0]), 19, 256,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl40_ant0_rev3,
|
||||
sizeof(tdi_tbl40_ant0_rev3) / sizeof(tdi_tbl40_ant0_rev3[0]), 19, 640,
|
||||
32}
|
||||
,
|
||||
{&tdi_tbl40_ant1_rev3,
|
||||
sizeof(tdi_tbl40_ant1_rev3) / sizeof(tdi_tbl40_ant1_rev3[0]), 19, 768,
|
||||
32}
|
||||
,
|
||||
{&pltlut_tbl_rev3, sizeof(pltlut_tbl_rev3) / sizeof(pltlut_tbl_rev3[0]),
|
||||
20, 0, 32}
|
||||
,
|
||||
{&chanest_tbl_rev3,
|
||||
sizeof(chanest_tbl_rev3) / sizeof(chanest_tbl_rev3[0]), 22, 0, 32}
|
||||
,
|
||||
{&frame_lut_rev3, sizeof(frame_lut_rev3) / sizeof(frame_lut_rev3[0]),
|
||||
24, 0, 8}
|
||||
,
|
||||
{&est_pwr_lut_core0_rev3,
|
||||
sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26,
|
||||
0, 8}
|
||||
,
|
||||
{&est_pwr_lut_core1_rev3,
|
||||
sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27,
|
||||
0, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core0_rev3,
|
||||
sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26,
|
||||
64, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core1_rev3,
|
||||
sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27,
|
||||
64, 8}
|
||||
,
|
||||
{&gainctrl_lut_core0_rev3,
|
||||
sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]),
|
||||
26, 192, 32}
|
||||
,
|
||||
{&gainctrl_lut_core1_rev3,
|
||||
sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]),
|
||||
27, 192, 32}
|
||||
,
|
||||
{&iq_lut_core0_rev3,
|
||||
sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32}
|
||||
,
|
||||
{&iq_lut_core1_rev3,
|
||||
sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32}
|
||||
,
|
||||
{&loft_lut_core0_rev3,
|
||||
sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448,
|
||||
16}
|
||||
,
|
||||
{&loft_lut_core1_rev3,
|
||||
sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448,
|
||||
16}
|
||||
,
|
||||
{&frame_struct_rev3, ARRAY_SIZE(frame_struct_rev3), 10, 0, 32},
|
||||
{&pilot_tbl_rev3, ARRAY_SIZE(pilot_tbl_rev3), 11, 0, 16},
|
||||
{&tmap_tbl_rev7, ARRAY_SIZE(tmap_tbl_rev7), 12, 0, 32},
|
||||
{&intlv_tbl_rev3, ARRAY_SIZE(intlv_tbl_rev3), 13, 0, 32},
|
||||
{&tdtrn_tbl_rev3, ARRAY_SIZE(tdtrn_tbl_rev3), 14, 0, 32},
|
||||
{&noise_var_tbl_rev7, ARRAY_SIZE(noise_var_tbl_rev7), 16, 0, 32},
|
||||
{&mcs_tbl_rev3, ARRAY_SIZE(mcs_tbl_rev3), 18, 0, 16},
|
||||
{&tdi_tbl20_ant0_rev3, ARRAY_SIZE(tdi_tbl20_ant0_rev3), 19, 128, 32},
|
||||
{&tdi_tbl20_ant1_rev3, ARRAY_SIZE(tdi_tbl20_ant1_rev3), 19, 256, 32},
|
||||
{&tdi_tbl40_ant0_rev3, ARRAY_SIZE(tdi_tbl40_ant0_rev3), 19, 640, 32},
|
||||
{&tdi_tbl40_ant1_rev3, ARRAY_SIZE(tdi_tbl40_ant1_rev3), 19, 768, 32},
|
||||
{&pltlut_tbl_rev3, ARRAY_SIZE(pltlut_tbl_rev3), 20, 0, 32},
|
||||
{&chanest_tbl_rev3, ARRAY_SIZE(chanest_tbl_rev3), 22, 0, 32},
|
||||
{&frame_lut_rev3, ARRAY_SIZE(frame_lut_rev3), 24, 0, 8},
|
||||
{&est_pwr_lut_core0_rev3, ARRAY_SIZE(est_pwr_lut_core0_rev3), 26, 0, 8},
|
||||
{&est_pwr_lut_core1_rev3, ARRAY_SIZE(est_pwr_lut_core1_rev3), 27, 0, 8},
|
||||
{&adj_pwr_lut_core0_rev3, ARRAY_SIZE(adj_pwr_lut_core0_rev3), 26, 64, 8},
|
||||
{&adj_pwr_lut_core1_rev3, ARRAY_SIZE(adj_pwr_lut_core1_rev3), 27, 64, 8},
|
||||
{&gainctrl_lut_core0_rev3, ARRAY_SIZE(gainctrl_lut_core0_rev3), 26, 192, 32},
|
||||
{&gainctrl_lut_core1_rev3, ARRAY_SIZE(gainctrl_lut_core1_rev3), 27, 192, 32},
|
||||
{&iq_lut_core0_rev3, ARRAY_SIZE(iq_lut_core0_rev3), 26, 320, 32},
|
||||
{&iq_lut_core1_rev3, ARRAY_SIZE(iq_lut_core1_rev3), 27, 320, 32},
|
||||
{&loft_lut_core0_rev3, ARRAY_SIZE(loft_lut_core0_rev3), 26, 448, 16},
|
||||
{&loft_lut_core1_rev3, ARRAY_SIZE(loft_lut_core1_rev3), 27, 448, 16},
|
||||
{&papd_comp_rfpwr_tbl_core0_rev3,
|
||||
sizeof(papd_comp_rfpwr_tbl_core0_rev3) /
|
||||
sizeof(papd_comp_rfpwr_tbl_core0_rev3[0]), 26, 576, 16}
|
||||
,
|
||||
ARRAY_SIZE(papd_comp_rfpwr_tbl_core0_rev3), 26, 576, 16},
|
||||
{&papd_comp_rfpwr_tbl_core1_rev3,
|
||||
sizeof(papd_comp_rfpwr_tbl_core1_rev3) /
|
||||
sizeof(papd_comp_rfpwr_tbl_core1_rev3[0]), 27, 576, 16}
|
||||
,
|
||||
ARRAY_SIZE(papd_comp_rfpwr_tbl_core1_rev3), 27, 576, 16},
|
||||
{&papd_comp_epsilon_tbl_core0_rev7,
|
||||
sizeof(papd_comp_epsilon_tbl_core0_rev7) /
|
||||
sizeof(papd_comp_epsilon_tbl_core0_rev7[0]), 31, 0, 32}
|
||||
,
|
||||
ARRAY_SIZE(papd_comp_epsilon_tbl_core0_rev7), 31, 0, 32},
|
||||
{&papd_cal_scalars_tbl_core0_rev7,
|
||||
sizeof(papd_cal_scalars_tbl_core0_rev7) /
|
||||
sizeof(papd_cal_scalars_tbl_core0_rev7[0]), 32, 0, 32}
|
||||
,
|
||||
ARRAY_SIZE(papd_cal_scalars_tbl_core0_rev7), 32, 0, 32},
|
||||
{&papd_comp_epsilon_tbl_core1_rev7,
|
||||
sizeof(papd_comp_epsilon_tbl_core1_rev7) /
|
||||
sizeof(papd_comp_epsilon_tbl_core1_rev7[0]), 33, 0, 32}
|
||||
,
|
||||
ARRAY_SIZE(papd_comp_epsilon_tbl_core1_rev7), 33, 0, 32},
|
||||
{&papd_cal_scalars_tbl_core1_rev7,
|
||||
sizeof(papd_cal_scalars_tbl_core1_rev7) /
|
||||
sizeof(papd_cal_scalars_tbl_core1_rev7[0]), 34, 0, 32}
|
||||
,
|
||||
ARRAY_SIZE(papd_cal_scalars_tbl_core1_rev7), 34, 0, 32},
|
||||
};
|
||||
|
||||
const u32 mimophytbl_info_sz_rev7 =
|
||||
sizeof(mimophytbl_info_rev7) / sizeof(mimophytbl_info_rev7[0]);
|
||||
const u32 mimophytbl_info_sz_rev7 = ARRAY_SIZE(mimophytbl_info_rev7);
|
||||
|
||||
const struct phytbl_info mimophytbl_info_rev16[] = {
|
||||
{&noise_var_tbl_rev7,
|
||||
sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32}
|
||||
,
|
||||
{&est_pwr_lut_core0_rev3,
|
||||
sizeof(est_pwr_lut_core0_rev3) / sizeof(est_pwr_lut_core0_rev3[0]), 26,
|
||||
0, 8}
|
||||
,
|
||||
{&est_pwr_lut_core1_rev3,
|
||||
sizeof(est_pwr_lut_core1_rev3) / sizeof(est_pwr_lut_core1_rev3[0]), 27,
|
||||
0, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core0_rev3,
|
||||
sizeof(adj_pwr_lut_core0_rev3) / sizeof(adj_pwr_lut_core0_rev3[0]), 26,
|
||||
64, 8}
|
||||
,
|
||||
{&adj_pwr_lut_core1_rev3,
|
||||
sizeof(adj_pwr_lut_core1_rev3) / sizeof(adj_pwr_lut_core1_rev3[0]), 27,
|
||||
64, 8}
|
||||
,
|
||||
{&gainctrl_lut_core0_rev3,
|
||||
sizeof(gainctrl_lut_core0_rev3) / sizeof(gainctrl_lut_core0_rev3[0]),
|
||||
26, 192, 32}
|
||||
,
|
||||
{&gainctrl_lut_core1_rev3,
|
||||
sizeof(gainctrl_lut_core1_rev3) / sizeof(gainctrl_lut_core1_rev3[0]),
|
||||
27, 192, 32}
|
||||
,
|
||||
{&iq_lut_core0_rev3,
|
||||
sizeof(iq_lut_core0_rev3) / sizeof(iq_lut_core0_rev3[0]), 26, 320, 32}
|
||||
,
|
||||
{&iq_lut_core1_rev3,
|
||||
sizeof(iq_lut_core1_rev3) / sizeof(iq_lut_core1_rev3[0]), 27, 320, 32}
|
||||
,
|
||||
{&loft_lut_core0_rev3,
|
||||
sizeof(loft_lut_core0_rev3) / sizeof(loft_lut_core0_rev3[0]), 26, 448,
|
||||
16}
|
||||
,
|
||||
{&loft_lut_core1_rev3,
|
||||
sizeof(loft_lut_core1_rev3) / sizeof(loft_lut_core1_rev3[0]), 27, 448,
|
||||
16}
|
||||
,
|
||||
{&noise_var_tbl_rev7, ARRAY_SIZE(noise_var_tbl_rev7), 16, 0, 32},
|
||||
{&est_pwr_lut_core0_rev3, ARRAY_SIZE(est_pwr_lut_core0_rev3), 26, 0, 8},
|
||||
{&est_pwr_lut_core1_rev3, ARRAY_SIZE(est_pwr_lut_core1_rev3), 27, 0, 8},
|
||||
{&adj_pwr_lut_core0_rev3, ARRAY_SIZE(adj_pwr_lut_core0_rev3), 26, 64, 8},
|
||||
{&adj_pwr_lut_core1_rev3, ARRAY_SIZE(adj_pwr_lut_core1_rev3), 27, 64, 8},
|
||||
{&gainctrl_lut_core0_rev3, ARRAY_SIZE(gainctrl_lut_core0_rev3), 26, 192, 32},
|
||||
{&gainctrl_lut_core1_rev3, ARRAY_SIZE(gainctrl_lut_core1_rev3), 27, 192, 32},
|
||||
{&iq_lut_core0_rev3, ARRAY_SIZE(iq_lut_core0_rev3), 26, 320, 32},
|
||||
{&iq_lut_core1_rev3, ARRAY_SIZE(iq_lut_core1_rev3), 27, 320, 32},
|
||||
{&loft_lut_core0_rev3, ARRAY_SIZE(loft_lut_core0_rev3), 26, 448, 16},
|
||||
{&loft_lut_core1_rev3, ARRAY_SIZE(loft_lut_core1_rev3), 27, 448, 16},
|
||||
};
|
||||
|
||||
const u32 mimophytbl_info_sz_rev16 =
|
||||
sizeof(mimophytbl_info_rev16) / sizeof(mimophytbl_info_rev16[0]);
|
||||
const u32 mimophytbl_info_sz_rev16 = ARRAY_SIZE(mimophytbl_info_rev16);
|
||||
|
||||
@ -43,6 +43,7 @@
|
||||
#include "../pwrseqcmd.h"
|
||||
#include "pwrseq.h"
|
||||
#include "../btcoexist/rtl_btc.h"
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#define LLT_CONFIG 5
|
||||
|
||||
@ -2126,28 +2127,28 @@ static void _rtl8723be_read_adapter_info(struct ieee80211_hw *hw,
|
||||
|
||||
if (rtlhal->oem_id == RT_CID_DEFAULT) {
|
||||
/* Does this one have a Toshiba SMID from group 1? */
|
||||
for (i = 0; i < sizeof(toshiba_smid1) / sizeof(u16); i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(toshiba_smid1); i++) {
|
||||
if (rtlefuse->eeprom_smid == toshiba_smid1[i]) {
|
||||
is_toshiba_smid1 = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* Does this one have a Toshiba SMID from group 2? */
|
||||
for (i = 0; i < sizeof(toshiba_smid2) / sizeof(u16); i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(toshiba_smid2); i++) {
|
||||
if (rtlefuse->eeprom_smid == toshiba_smid2[i]) {
|
||||
is_toshiba_smid2 = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* Does this one have a Samsung SMID? */
|
||||
for (i = 0; i < sizeof(samsung_smid) / sizeof(u16); i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(samsung_smid); i++) {
|
||||
if (rtlefuse->eeprom_smid == samsung_smid[i]) {
|
||||
is_samsung_smid = true;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* Does this one have a Lenovo SMID? */
|
||||
for (i = 0; i < sizeof(lenovo_smid) / sizeof(u16); i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(lenovo_smid); i++) {
|
||||
if (rtlefuse->eeprom_smid == lenovo_smid[i]) {
|
||||
is_lenovo_smid = true;
|
||||
break;
|
||||
|
||||
@ -35,6 +35,7 @@
|
||||
#include "../rtl8723com/dm_common.h"
|
||||
#include "table.h"
|
||||
#include "trx.h"
|
||||
#include <linux/kernel.h>
|
||||
|
||||
static bool _rtl8723be_phy_bb8723b_config_parafile(struct ieee80211_hw *hw);
|
||||
static bool _rtl8723be_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
|
||||
@ -1143,14 +1144,13 @@ void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
|
||||
DESC92C_RATEMCS2, DESC92C_RATEMCS3,
|
||||
DESC92C_RATEMCS4, DESC92C_RATEMCS5,
|
||||
DESC92C_RATEMCS6, DESC92C_RATEMCS7};
|
||||
u8 i, size;
|
||||
u8 i;
|
||||
u8 power_index;
|
||||
|
||||
if (!rtlefuse->txpwr_fromeprom)
|
||||
return;
|
||||
|
||||
size = sizeof(cck_rates) / sizeof(u8);
|
||||
for (i = 0; i < size; i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(cck_rates); i++) {
|
||||
power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,
|
||||
cck_rates[i],
|
||||
rtl_priv(hw)->phy.current_chan_bw,
|
||||
@ -1158,8 +1158,7 @@ void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
|
||||
_rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A,
|
||||
cck_rates[i]);
|
||||
}
|
||||
size = sizeof(ofdm_rates) / sizeof(u8);
|
||||
for (i = 0; i < size; i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(ofdm_rates); i++) {
|
||||
power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,
|
||||
ofdm_rates[i],
|
||||
rtl_priv(hw)->phy.current_chan_bw,
|
||||
@ -1167,8 +1166,7 @@ void rtl8723be_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
|
||||
_rtl8723be_phy_set_txpower_index(hw, power_index, RF90_PATH_A,
|
||||
ofdm_rates[i]);
|
||||
}
|
||||
size = sizeof(ht_rates_1t) / sizeof(u8);
|
||||
for (i = 0; i < size; i++) {
|
||||
for (i = 0; i < ARRAY_SIZE(ht_rates_1t); i++) {
|
||||
power_index = _rtl8723be_get_txpower_index(hw, RF90_PATH_A,
|
||||
ht_rates_1t[i],
|
||||
rtl_priv(hw)->phy.current_chan_bw,
|
||||
|
||||
@ -25,6 +25,7 @@
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include "table.h"
|
||||
|
||||
u32 RTL8723BEPHY_REG_1TARRAY[] = {
|
||||
@ -224,8 +225,7 @@ u32 RTL8723BEPHY_REG_1TARRAY[] = {
|
||||
|
||||
};
|
||||
|
||||
u32 RTL8723BEPHY_REG_1TARRAYLEN =
|
||||
sizeof(RTL8723BEPHY_REG_1TARRAY) / sizeof(u32);
|
||||
u32 RTL8723BEPHY_REG_1TARRAYLEN = ARRAY_SIZE(RTL8723BEPHY_REG_1TARRAY);
|
||||
|
||||
u32 RTL8723BEPHY_REG_ARRAY_PG[] = {
|
||||
0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003800,
|
||||
@ -236,8 +236,7 @@ u32 RTL8723BEPHY_REG_ARRAY_PG[] = {
|
||||
0, 0, 0, 0x00000e14, 0xffffffff, 0x26303436
|
||||
};
|
||||
|
||||
u32 RTL8723BEPHY_REG_ARRAY_PGLEN =
|
||||
sizeof(RTL8723BEPHY_REG_ARRAY_PG) / sizeof(u32);
|
||||
u32 RTL8723BEPHY_REG_ARRAY_PGLEN = ARRAY_SIZE(RTL8723BEPHY_REG_ARRAY_PG);
|
||||
|
||||
u32 RTL8723BE_RADIOA_1TARRAY[] = {
|
||||
0x000, 0x00010000,
|
||||
@ -373,8 +372,7 @@ u32 RTL8723BE_RADIOA_1TARRAY[] = {
|
||||
|
||||
};
|
||||
|
||||
u32 RTL8723BE_RADIOA_1TARRAYLEN =
|
||||
sizeof(RTL8723BE_RADIOA_1TARRAY) / sizeof(u32);
|
||||
u32 RTL8723BE_RADIOA_1TARRAYLEN = ARRAY_SIZE(RTL8723BE_RADIOA_1TARRAY);
|
||||
|
||||
u32 RTL8723BEMAC_1T_ARRAY[] = {
|
||||
0x02F, 0x00000030,
|
||||
@ -483,7 +481,7 @@ u32 RTL8723BEMAC_1T_ARRAY[] = {
|
||||
|
||||
};
|
||||
|
||||
u32 RTL8723BEMAC_1T_ARRAYLEN = sizeof(RTL8723BEMAC_1T_ARRAY) / sizeof(u32);
|
||||
u32 RTL8723BEMAC_1T_ARRAYLEN = ARRAY_SIZE(RTL8723BEMAC_1T_ARRAY);
|
||||
|
||||
u32 RTL8723BEAGCTAB_1TARRAY[] = {
|
||||
0xC78, 0xFD000001,
|
||||
@ -620,4 +618,4 @@ u32 RTL8723BEAGCTAB_1TARRAY[] = {
|
||||
|
||||
};
|
||||
|
||||
u32 RTL8723BEAGCTAB_1TARRAYLEN = sizeof(RTL8723BEAGCTAB_1TARRAY) / sizeof(u32);
|
||||
u32 RTL8723BEAGCTAB_1TARRAYLEN = ARRAY_SIZE(RTL8723BEAGCTAB_1TARRAY);
|
||||
|
||||
@ -24,7 +24,7 @@
|
||||
* Larry Finger <Larry.Finger@lwfinger.net>
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include "table.h"
|
||||
u32 RTL8812AE_PHY_REG_ARRAY[] = {
|
||||
0x800, 0x8020D010,
|
||||
@ -258,8 +258,7 @@ u32 RTL8812AE_PHY_REG_ARRAY[] = {
|
||||
0xEB8, 0x00508242,
|
||||
};
|
||||
|
||||
u32 RTL8812AE_PHY_REG_1TARRAYLEN =
|
||||
sizeof(RTL8812AE_PHY_REG_ARRAY) / sizeof(u32);
|
||||
u32 RTL8812AE_PHY_REG_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_PHY_REG_ARRAY);
|
||||
|
||||
u32 RTL8821AE_PHY_REG_ARRAY[] = {
|
||||
0x800, 0x0020D090,
|
||||
@ -436,8 +435,7 @@ u32 RTL8821AE_PHY_REG_ARRAY[] = {
|
||||
0xCB8, 0x00508240,
|
||||
};
|
||||
|
||||
u32 RTL8821AE_PHY_REG_1TARRAYLEN =
|
||||
sizeof(RTL8821AE_PHY_REG_ARRAY) / sizeof(u32);
|
||||
u32 RTL8821AE_PHY_REG_1TARRAYLEN = ARRAY_SIZE(RTL8821AE_PHY_REG_ARRAY);
|
||||
|
||||
u32 RTL8812AE_PHY_REG_ARRAY_PG[] = {
|
||||
0, 0, 0, 0x00000c20, 0xffffffff, 0x34363840,
|
||||
@ -488,8 +486,7 @@ u32 RTL8812AE_PHY_REG_ARRAY_PG[] = {
|
||||
1, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628
|
||||
};
|
||||
|
||||
u32 RTL8812AE_PHY_REG_ARRAY_PGLEN =
|
||||
sizeof(RTL8812AE_PHY_REG_ARRAY_PG) / sizeof(u32);
|
||||
u32 RTL8812AE_PHY_REG_ARRAY_PGLEN = ARRAY_SIZE(RTL8812AE_PHY_REG_ARRAY_PG);
|
||||
|
||||
u32 RTL8821AE_PHY_REG_ARRAY_PG[] = {
|
||||
0, 0, 0, 0x00000c20, 0xffffffff, 0x32343638,
|
||||
@ -509,8 +506,7 @@ u32 RTL8821AE_PHY_REG_ARRAY_PG[] = {
|
||||
1, 0, 0, 0x00000c44, 0x0000ffff, 0x00002022
|
||||
};
|
||||
|
||||
u32 RTL8821AE_PHY_REG_ARRAY_PGLEN =
|
||||
sizeof(RTL8821AE_PHY_REG_ARRAY_PG) / sizeof(u32);
|
||||
u32 RTL8821AE_PHY_REG_ARRAY_PGLEN = ARRAY_SIZE(RTL8821AE_PHY_REG_ARRAY_PG);
|
||||
|
||||
u32 RTL8812AE_RADIOA_ARRAY[] = {
|
||||
0x000, 0x00010000,
|
||||
@ -927,7 +923,7 @@ u32 RTL8812AE_RADIOA_ARRAY[] = {
|
||||
0x018, 0x0001712A,
|
||||
};
|
||||
|
||||
u32 RTL8812AE_RADIOA_1TARRAYLEN = sizeof(RTL8812AE_RADIOA_ARRAY) / sizeof(u32);
|
||||
u32 RTL8812AE_RADIOA_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_RADIOA_ARRAY);
|
||||
|
||||
u32 RTL8812AE_RADIOB_ARRAY[] = {
|
||||
0x056, 0x00051CF2,
|
||||
@ -1335,7 +1331,7 @@ u32 RTL8812AE_RADIOB_ARRAY[] = {
|
||||
0x008, 0x00008400,
|
||||
};
|
||||
|
||||
u32 RTL8812AE_RADIOB_1TARRAYLEN = sizeof(RTL8812AE_RADIOB_ARRAY) / sizeof(u32);
|
||||
u32 RTL8812AE_RADIOB_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_RADIOB_ARRAY);
|
||||
|
||||
u32 RTL8821AE_RADIOA_ARRAY[] = {
|
||||
0x018, 0x0001712A,
|
||||
@ -1929,7 +1925,7 @@ u32 RTL8821AE_RADIOA_ARRAY[] = {
|
||||
|
||||
};
|
||||
|
||||
u32 RTL8821AE_RADIOA_1TARRAYLEN = sizeof(RTL8821AE_RADIOA_ARRAY) / sizeof(u32);
|
||||
u32 RTL8821AE_RADIOA_1TARRAYLEN = ARRAY_SIZE(RTL8821AE_RADIOA_ARRAY);
|
||||
|
||||
u32 RTL8812AE_MAC_REG_ARRAY[] = {
|
||||
0x010, 0x0000000C,
|
||||
@ -2041,7 +2037,7 @@ u32 RTL8812AE_MAC_REG_ARRAY[] = {
|
||||
0x718, 0x00000040,
|
||||
};
|
||||
|
||||
u32 RTL8812AE_MAC_1T_ARRAYLEN = sizeof(RTL8812AE_MAC_REG_ARRAY) / sizeof(u32);
|
||||
u32 RTL8812AE_MAC_1T_ARRAYLEN = ARRAY_SIZE(RTL8812AE_MAC_REG_ARRAY);
|
||||
|
||||
u32 RTL8821AE_MAC_REG_ARRAY[] = {
|
||||
0x428, 0x0000000A,
|
||||
@ -2143,7 +2139,7 @@ u32 RTL8821AE_MAC_REG_ARRAY[] = {
|
||||
0x718, 0x00000040,
|
||||
};
|
||||
|
||||
u32 RTL8821AE_MAC_1T_ARRAYLEN = sizeof(RTL8821AE_MAC_REG_ARRAY) / sizeof(u32);
|
||||
u32 RTL8821AE_MAC_1T_ARRAYLEN = ARRAY_SIZE(RTL8821AE_MAC_REG_ARRAY);
|
||||
|
||||
u32 RTL8812AE_AGC_TAB_ARRAY[] = {
|
||||
0x80000001, 0x00000000, 0x40000000, 0x00000000,
|
||||
@ -2479,8 +2475,7 @@ u32 RTL8812AE_AGC_TAB_ARRAY[] = {
|
||||
0xE50, 0x00000020,
|
||||
};
|
||||
|
||||
u32 RTL8812AE_AGC_TAB_1TARRAYLEN =
|
||||
sizeof(RTL8812AE_AGC_TAB_ARRAY) / sizeof(u32);
|
||||
u32 RTL8812AE_AGC_TAB_1TARRAYLEN = ARRAY_SIZE(RTL8812AE_AGC_TAB_ARRAY);
|
||||
|
||||
u32 RTL8821AE_AGC_TAB_ARRAY[] = {
|
||||
0x81C, 0xBF000001,
|
||||
@ -2676,8 +2671,7 @@ u32 RTL8821AE_AGC_TAB_ARRAY[] = {
|
||||
0xC50, 0x00000020,
|
||||
};
|
||||
|
||||
u32 RTL8821AE_AGC_TAB_1TARRAYLEN =
|
||||
sizeof(RTL8821AE_AGC_TAB_ARRAY) / sizeof(u32);
|
||||
u32 RTL8821AE_AGC_TAB_1TARRAYLEN = ARRAY_SIZE(RTL8821AE_AGC_TAB_ARRAY);
|
||||
|
||||
/******************************************************************************
|
||||
* TXPWR_LMT.TXT
|
||||
@ -3250,7 +3244,7 @@ u8 *RTL8812AE_TXPWR_LMT[] = {
|
||||
"MKK", "5G", "80M", "VHT", "2T", "155", "63"
|
||||
};
|
||||
|
||||
u32 RTL8812AE_TXPWR_LMT_ARRAY_LEN = sizeof(RTL8812AE_TXPWR_LMT) / sizeof(u8 *);
|
||||
u32 RTL8812AE_TXPWR_LMT_ARRAY_LEN = ARRAY_SIZE(RTL8812AE_TXPWR_LMT);
|
||||
|
||||
u8 *RTL8821AE_TXPWR_LMT[] = {
|
||||
"FCC", "2.4G", "20M", "CCK", "1T", "01", "32",
|
||||
@ -3819,4 +3813,4 @@ u8 *RTL8821AE_TXPWR_LMT[] = {
|
||||
"MKK", "5G", "80M", "VHT", "2T", "155", "63"
|
||||
};
|
||||
|
||||
u32 RTL8821AE_TXPWR_LMT_ARRAY_LEN = sizeof(RTL8821AE_TXPWR_LMT) / sizeof(u8 *);
|
||||
u32 RTL8821AE_TXPWR_LMT_ARRAY_LEN = ARRAY_SIZE(RTL8821AE_TXPWR_LMT);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user