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Two RAS related fixes:

Browse Source 
- Shut down the per CPU thermal throttling poll work properly when a CPU
     goes offline. The missing shutdown caused the poll work to be migrated
     to a unbound worker which triggered warnings about the usage of
     smp_processor_id() in preemptible context
 
   - Fix the PPIN feature initialization which missed to enable the
     functionality when PPIN_CTL was enabled but the MSR locked against
     updates.
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Merge tag 'ras-urgent-2020-03-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull RAS fixes from Thomas Gleixner:
 "Two RAS related fixes:

   - Shut down the per CPU thermal throttling poll work properly when a
     CPU goes offline.

     The missing shutdown caused the poll work to be migrated to a
     unbound worker which triggered warnings about the usage of
     smp_processor_id() in preemptible context

   - Fix the PPIN feature initialization which missed to enable the
     functionality when PPIN_CTL was enabled but the MSR locked against
     updates"

* tag 'ras-urgent-2020-03-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mce: Fix logic and comments around MSR_PPIN_CTL
  x86/mce/therm_throt: Undo thermal polling properly on CPU offline
This commit is contained in:
Linus Torvalds 2020-03-15 12:44:23 -07:00
commit 52ac3777fc
2 changed files with 12 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
arch/x86/kernel/cpu/mce/intel.c
View File

@ -493,17 +493,18 @@ static void intel_ppin_init(struct cpuinfo_x86 *c)
return; return;
if ((val & 3UL) == 1UL) { if ((val & 3UL) == 1UL) {
/* PPIN available but disabled: */ /* PPIN locked in disabled mode */
return; return;
} }
/* If PPIN is disabled, but not locked, try to enable: */ /* If PPIN is disabled, try to enable */
if (!(val & 3UL)) { if (!(val & 2UL)) {
wrmsrl_safe(MSR_PPIN_CTL, val | 2UL); wrmsrl_safe(MSR_PPIN_CTL, val | 2UL);
rdmsrl_safe(MSR_PPIN_CTL, &val); rdmsrl_safe(MSR_PPIN_CTL, &val);
} }
if ((val & 3UL) == 2UL) /* Is the enable bit set? */
if (val & 2UL)
set_cpu_cap(c, X86_FEATURE_INTEL_PPIN); set_cpu_cap(c, X86_FEATURE_INTEL_PPIN);
} }
} }

9
arch/x86/kernel/cpu/mce/therm_throt.c
View File

@ -486,9 +486,14 @@ static int thermal_throttle_offline(unsigned int cpu)
{ {
struct thermal_state *state = &per_cpu(thermal_state, cpu); struct thermal_state *state = &per_cpu(thermal_state, cpu);
struct device *dev = get_cpu_device(cpu); struct device *dev = get_cpu_device(cpu);
u32 l;
cancel_delayed_work(&state->package_throttle.therm_work); /* Mask the thermal vector before draining evtl. pending work */
cancel_delayed_work(&state->core_throttle.therm_work); l = apic_read(APIC_LVTTHMR);
apic_write(APIC_LVTTHMR, l | APIC_LVT_MASKED);
cancel_delayed_work_sync(&state->package_throttle.therm_work);
cancel_delayed_work_sync(&state->core_throttle.therm_work);
state->package_throttle.rate_control_active = false; state->package_throttle.rate_control_active = false;
state->core_throttle.rate_control_active = false; state->core_throttle.rate_control_active = false;