AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-11-29 21:16:40 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

ARM: dts: enable clock support for Broadcom Cygnus

Browse Source 
Replace current device tree dummy clocks with real clock support for
Broadcom Cygnus SoC

Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Ray Jui 2015-05-05 11:13:22 -07:00 committed by Florian Fainelli
parent d770e558e2
commit 5253ed194c
1 changed files with 62 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

91
arch/arm/boot/dts/bcm-cygnus-clock.dtsi
View File

@ -36,56 +36,89 @@ clocks {
ranges;
osc: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
#clock-cells = <1>;
clock-frequency = <25000000>;
};
/* Cygnus ARM PLL */
armpll: armpll {
#clock-cells = <0>;
compatible = "brcm,cygnus-armpll";
clocks = <&osc>;
reg = <0x19000000 0x1000>;
};
/* peripheral clock for system timer */
periph_clk: arm_periph_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&armpll>;
clock-div = <2>;
clock-mult = <1>;
};
/* APB bus clock */
apb_clk: apb_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000000>;
compatible = "fixed-factor-clock";
clocks = <&armpll>;
clock-div = <4>;
clock-mult = <1>;
};
periph_clk: periph_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <500000000>;
genpll: genpll {
#clock-cells = <1>;
compatible = "brcm,cygnus-genpll";
reg = <0x0301d000 0x2c>, <0x0301c020 0x4>;
clocks = <&osc>;
clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",
"enet_sw", "audio_125", "can";
};
sdio_clk: lcpll_ch2 {
compatible = "fixed-clock";
/* always 1/2 of the axi21 clock */
axi41_clk: axi41_clk {
#clock-cells = <0>;
clock-frequency = <200000000>;
compatible = "fixed-factor-clock";
clocks = <&genpll 1>;
clock-div = <2>;
clock-mult = <1>;
};
/* always 1/4 of the axi21 clock */
axi81_clk: axi81_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
compatible = "fixed-factor-clock";
clocks = <&genpll 1>;
clock-div = <4>;
clock-mult = <1>;
};
keypad_clk: keypad_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <31806>;
lcpll0: lcpll0 {
#clock-cells = <1>;
compatible = "brcm,cygnus-lcpll0";
reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>;
clocks = <&osc>;
clock-output-names = "lcpll0", "pcie_phy", "ddr_phy", "sdio",
"usb_phy", "smart_card", "ch5";
};
adc_clk: adc_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1562500>;
mipipll: mipipll {
#clock-cells = <1>;
compatible = "brcm,cygnus-mipipll";
reg = <0x180a9800 0x2c>, <0x0301c020 0x4>, <0x180aa024 0x4>;
clocks = <&osc>;
clock-output-names = "mipipll", "ch0_unused", "ch1_lcd",
"ch2_v3d", "ch3_unused", "ch4_unused",
"ch5_unused";
};
pwm_clk: pwm_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <1000000>;
};
asiu_clks: asiu_clks {
#clock-cells = <1>;
compatible = "brcm,cygnus-asiu-clk";
reg = <0x0301d048 0xc>, <0x180aa024 0x4>;
lcd_clk: mipipll_ch1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <100000000>;
clocks = <&osc>;
clock-output-names = "keypad", "adc/touch", "pwm";
};
};