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KVM: PPC: bookehv: Use lwz/stw instead of PPC_LL/PPC_STL for 32-bit fields
Interrupt code used PPC_LL/PPC_STL macros to load/store some of u32 fields which led to memory overflow on 64-bit. Use lwz/stw instead. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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@ -87,9 +87,9 @@
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mfspr r8, SPRN_TBRL
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mfspr r9, SPRN_TBRU
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cmpw r9, r7
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PPC_STL r8, VCPU_TIMING_EXIT_TBL(r4)
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stw r8, VCPU_TIMING_EXIT_TBL(r4)
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bne- 1b
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PPC_STL r9, VCPU_TIMING_EXIT_TBU(r4)
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stw r9, VCPU_TIMING_EXIT_TBU(r4)
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#endif
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oris r8, r6, MSR_CE@h
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@ -216,7 +216,7 @@ _GLOBAL(kvmppc_handler_\intno\()_\srr1)
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PPC_STL r4, VCPU_GPR(r4)(r11)
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PPC_LL r4, THREAD_NORMSAVE(0)(r10)
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PPC_STL r5, VCPU_GPR(r5)(r11)
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PPC_STL r13, VCPU_CR(r11)
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stw r13, VCPU_CR(r11)
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mfspr r5, \srr0
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PPC_STL r3, VCPU_GPR(r10)(r11)
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PPC_LL r3, THREAD_NORMSAVE(2)(r10)
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@ -243,7 +243,7 @@ _GLOBAL(kvmppc_handler_\intno\()_\srr1)
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PPC_STL r4, VCPU_GPR(r4)(r11)
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PPC_LL r4, GPR9(r8)
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PPC_STL r5, VCPU_GPR(r5)(r11)
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PPC_STL r9, VCPU_CR(r11)
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stw r9, VCPU_CR(r11)
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mfspr r5, \srr0
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PPC_STL r3, VCPU_GPR(r8)(r11)
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PPC_LL r3, GPR10(r8)
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@ -315,7 +315,7 @@ _GLOBAL(kvmppc_resume_host)
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mfspr r6, SPRN_SPRG4
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PPC_STL r5, VCPU_LR(r4)
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mfspr r7, SPRN_SPRG5
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PPC_STL r3, VCPU_VRSAVE(r4)
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stw r3, VCPU_VRSAVE(r4)
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PPC_STD(r6, VCPU_SHARED_SPRG4, r11)
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mfspr r8, SPRN_SPRG6
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PPC_STD(r7, VCPU_SHARED_SPRG5, r11)
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@ -551,7 +551,7 @@ lightweight_exit:
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PPC_LL r3, VCPU_LR(r4)
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PPC_LL r5, VCPU_XER(r4)
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PPC_LL r6, VCPU_CTR(r4)
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PPC_LL r7, VCPU_CR(r4)
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lwz r7, VCPU_CR(r4)
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PPC_LL r8, VCPU_PC(r4)
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PPC_LD(r9, VCPU_SHARED_MSR, r11)
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PPC_LL r0, VCPU_GPR(r0)(r4)
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@ -574,9 +574,9 @@ lightweight_exit:
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mfspr r9, SPRN_TBRL
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mfspr r8, SPRN_TBRU
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cmpw r8, r6
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PPC_STL r9, VCPU_TIMING_LAST_ENTER_TBL(r4)
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stw r9, VCPU_TIMING_LAST_ENTER_TBL(r4)
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bne 1b
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PPC_STL r8, VCPU_TIMING_LAST_ENTER_TBU(r4)
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stw r8, VCPU_TIMING_LAST_ENTER_TBU(r4)
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#endif
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/*
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