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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ARM: OMAP2+: Drop mmc platform data for omap5
We can now drop legacy platform data one interconnect target module at a time in favor of the device tree based data that has been added earlier. Signed-off-by: Tony Lindgren <tony@atomide.com>
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12a2a95421
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@ -18,7 +18,6 @@
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*/
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#include <linux/io.h>
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#include <linux/platform_data/hsmmc-omap.h>
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#include <linux/power/smartreflex.h>
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#include <linux/platform_data/i2c-omap.h>
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@ -1182,115 +1181,6 @@ static struct omap_hwmod omap54xx_mcspi4_hwmod = {
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},
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};
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/*
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* 'mmc' class
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* multimedia card high-speed/sd/sdio (mmc/sd/sdio) host controller
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*/
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static struct omap_hwmod_class_sysconfig omap54xx_mmc_sysc = {
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.rev_offs = 0x0000,
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.sysc_offs = 0x0010,
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.sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_MIDLEMODE |
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SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |
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SYSC_HAS_SOFTRESET),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
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MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
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.sysc_fields = &omap_hwmod_sysc_type2,
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};
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static struct omap_hwmod_class omap54xx_mmc_hwmod_class = {
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.name = "mmc",
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.sysc = &omap54xx_mmc_sysc,
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};
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/* mmc1 */
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static struct omap_hwmod_opt_clk mmc1_opt_clks[] = {
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{ .role = "32khz_clk", .clk = "mmc1_32khz_clk" },
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};
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/* mmc1 dev_attr */
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static struct omap_hsmmc_dev_attr mmc1_dev_attr = {
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.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
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};
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static struct omap_hwmod omap54xx_mmc1_hwmod = {
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.name = "mmc1",
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.class = &omap54xx_mmc_hwmod_class,
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.clkdm_name = "l3init_clkdm",
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.main_clk = "mmc1_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L3INIT_MMC1_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L3INIT_MMC1_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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.opt_clks = mmc1_opt_clks,
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.opt_clks_cnt = ARRAY_SIZE(mmc1_opt_clks),
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.dev_attr = &mmc1_dev_attr,
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};
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/* mmc2 */
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static struct omap_hwmod omap54xx_mmc2_hwmod = {
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.name = "mmc2",
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.class = &omap54xx_mmc_hwmod_class,
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.clkdm_name = "l3init_clkdm",
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.main_clk = "mmc2_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L3INIT_MMC2_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L3INIT_MMC2_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* mmc3 */
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static struct omap_hwmod omap54xx_mmc3_hwmod = {
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.name = "mmc3",
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.class = &omap54xx_mmc_hwmod_class,
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.clkdm_name = "l4per_clkdm",
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.main_clk = "func_48m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4PER_MMC3_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4PER_MMC3_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* mmc4 */
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static struct omap_hwmod omap54xx_mmc4_hwmod = {
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.name = "mmc4",
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.class = &omap54xx_mmc_hwmod_class,
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.clkdm_name = "l4per_clkdm",
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.main_clk = "func_48m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4PER_MMC4_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4PER_MMC4_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/* mmc5 */
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static struct omap_hwmod omap54xx_mmc5_hwmod = {
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.name = "mmc5",
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.class = &omap54xx_mmc_hwmod_class,
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.clkdm_name = "l4per_clkdm",
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.main_clk = "func_96m_fclk",
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.prcm = {
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.omap4 = {
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.clkctrl_offs = OMAP54XX_CM_L4PER_MMC5_CLKCTRL_OFFSET,
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.context_offs = OMAP54XX_RM_L4PER_MMC5_CONTEXT_OFFSET,
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.modulemode = MODULEMODE_SWCTRL,
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},
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},
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};
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/*
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* 'mmu' class
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* The memory management unit performs virtual to physical address translation
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@ -2456,46 +2346,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_per__mcspi4 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mmc1 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mmc1 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mmc1_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mmc2 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mmc2 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mmc2_hwmod,
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.clk = "l3_iclk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mmc3 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mmc3 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mmc3_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mmc4 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mmc4 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mmc4_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_per -> mmc5 */
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static struct omap_hwmod_ocp_if omap54xx_l4_per__mmc5 = {
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.master = &omap54xx_l4_per_hwmod,
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.slave = &omap54xx_mmc5_hwmod,
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.clk = "l4_root_clk_div",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_cfg -> mpu */
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static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = {
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.master = &omap54xx_l4_cfg_hwmod,
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@ -2741,11 +2591,6 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
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&omap54xx_l4_per__mcspi2,
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&omap54xx_l4_per__mcspi3,
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&omap54xx_l4_per__mcspi4,
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&omap54xx_l4_per__mmc1,
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&omap54xx_l4_per__mmc2,
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&omap54xx_l4_per__mmc3,
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&omap54xx_l4_per__mmc4,
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&omap54xx_l4_per__mmc5,
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&omap54xx_l4_cfg__mpu,
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&omap54xx_l4_cfg__spinlock,
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&omap54xx_l4_cfg__ocp2scp1,
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