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drm/amd/display: Restore missing DCE8 xfm regs
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -94,6 +94,10 @@
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SRI(SCL_UPDATE, SCL, id), \
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SRI(SCL_F_SHARP_CONTROL, SCL, id)
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#define XFM_COMMON_REG_LIST_DCE80(id) \
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XFM_COMMON_REG_LIST_DCE_BASE(id), \
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SRI(DCFE_MEM_LIGHT_SLEEP_CNTL, CRTC, id)
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#define XFM_COMMON_REG_LIST_DCE100(id) \
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XFM_COMMON_REG_LIST_DCE_BASE(id), \
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SRI(DCFE_MEM_PWR_CTRL, CRTC, id), \
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@ -185,6 +189,12 @@
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XFM_SF(SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \
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XFM_SF(LB_DATA_FORMAT, ALPHA_EN, mask_sh)
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#define XFM_COMMON_MASK_SH_LIST_DCE80(mask_sh) \
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XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh), \
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OPP_SF(DCFE_MEM_LIGHT_SLEEP_CNTL, REGAMMA_LUT_LIGHT_SLEEP_DIS, mask_sh),\
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OPP_SF(DCFE_MEM_LIGHT_SLEEP_CNTL, DCP_LUT_LIGHT_SLEEP_DIS, mask_sh),\
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OPP_SF(DCFE_MEM_LIGHT_SLEEP_CNTL, REGAMMA_LUT_MEM_PWR_STATE, mask_sh)
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#define XFM_COMMON_MASK_SH_LIST_DCE110(mask_sh) \
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XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh), \
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XFM_SF(DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
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@ -187,7 +187,7 @@ static const struct dce_ipp_mask ipp_mask = {
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#define transform_regs(id)\
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[id] = {\
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XFM_COMMON_REG_LIST_DCE_BASE(id)\
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XFM_COMMON_REG_LIST_DCE80(id)\
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}
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static const struct dce_transform_registers xfm_regs[] = {
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@ -200,11 +200,11 @@ static const struct dce_transform_registers xfm_regs[] = {
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};
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static const struct dce_transform_shift xfm_shift = {
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XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(__SHIFT)
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XFM_COMMON_MASK_SH_LIST_DCE80(__SHIFT)
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};
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static const struct dce_transform_mask xfm_mask = {
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XFM_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(_MASK)
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XFM_COMMON_MASK_SH_LIST_DCE80(_MASK)
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};
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#define aux_regs(id)\
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