mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Merge branch 'drm-next/mxsfb' of git://git.kernel.org/pub/scm/linux/kernel/git/marex/linux-2.6 into drm-next
Add new driver for MXSFB. * 'drm-next/mxsfb' of git://git.kernel.org/pub/scm/linux/kernel/git/marex/linux-2.6: drm: Add new driver for MXSFB controller dt-bindings: mxsfb: Add new bindings for the MXSFB driver dt-bindings: mxsfb: Indentation cleanup
This commit is contained in:
Dave Airlie
commit
51007df383
@ -1,20 +1,57 @@
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* Freescale MXS LCD Interface (LCDIF)
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New bindings:
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=============
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Required properties:
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- compatible: Should be "fsl,<chip>-lcdif". Supported chips include
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imx23 and imx28.
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- reg: Address and length of the register set for lcdif
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- interrupts: Should contain lcdif interrupts
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- display : phandle to display node (see below for details)
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- compatible: Should be "fsl,imx23-lcdif" for i.MX23.
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Should be "fsl,imx28-lcdif" for i.MX28.
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Should be "fsl,imx6sx-lcdif" for i.MX6SX.
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- reg: Address and length of the register set for LCDIF
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- interrupts: Should contain LCDIF interrupt
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- clocks: A list of phandle + clock-specifier pairs, one for each
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entry in 'clock-names'.
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- clock-names: A list of clock names. For MXSFB it should contain:
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- "pix" for the LCDIF block clock
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- (MX6SX-only) "axi", "disp_axi" for the bus interface clock
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Required sub-nodes:
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- port: The connection to an encoder chip.
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Example:
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lcdif1: display-controller@2220000 {
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compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
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reg = <0x02220000 0x4000>;
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interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>,
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<&clks IMX6SX_CLK_LCDIF_APB>,
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<&clks IMX6SX_CLK_DISPLAY_AXI>;
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clock-names = "pix", "axi", "disp_axi";
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port {
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parallel_out: endpoint {
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remote-endpoint = <&panel_in_parallel>;
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};
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};
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};
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Deprecated bindings:
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====================
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Required properties:
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- compatible: Should be "fsl,imx23-lcdif" for i.MX23.
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Should be "fsl,imx28-lcdif" for i.MX28.
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- reg: Address and length of the register set for LCDIF
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- interrupts: Should contain LCDIF interrupts
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- display: phandle to display node (see below for details)
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* display node
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Required properties:
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- bits-per-pixel : <16> for RGB565, <32> for RGB888/666.
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- bus-width : number of data lines. Could be <8>, <16>, <18> or <24>.
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- bits-per-pixel: <16> for RGB565, <32> for RGB888/666.
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- bus-width: number of data lines. Could be <8>, <16>, <18> or <24>.
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Required sub-node:
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- display-timings : Refer to binding doc display-timing.txt for details.
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- display-timings: Refer to binding doc display-timing.txt for details.
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Examples:
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@ -8319,6 +8319,12 @@ T: git git://linuxtv.org/mkrufky/tuners.git
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S: Maintained
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F: drivers/media/tuners/mxl5007t.*
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MXSFB DRM DRIVER
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M: Marek Vasut <marex@denx.de>
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S: Supported
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F: drivers/gpu/drm/mxsfb/
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F: Documentation/devicetree/bindings/display/mxsfb-drm.txt
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MYRICOM MYRI-10G 10GbE DRIVER (MYRI10GE)
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M: Hyong-Youb Kim <hykim@myri.com>
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L: netdev@vger.kernel.org
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@ -240,6 +240,8 @@ source "drivers/gpu/drm/mediatek/Kconfig"
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source "drivers/gpu/drm/zte/Kconfig"
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source "drivers/gpu/drm/mxsfb/Kconfig"
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# Keep legacy drivers last
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menuconfig DRM_LEGACY
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@ -89,3 +89,4 @@ obj-$(CONFIG_DRM_ETNAVIV) += etnaviv/
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obj-$(CONFIG_DRM_ARCPGU)+= arc/
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obj-y += hisilicon/
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obj-$(CONFIG_DRM_ZTE) += zte/
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obj-$(CONFIG_DRM_MXSFB) += mxsfb/
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18
drivers/gpu/drm/mxsfb/Kconfig
Normal file
18
drivers/gpu/drm/mxsfb/Kconfig
Normal file
@ -0,0 +1,18 @@
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config DRM_MXS
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bool
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help
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Choose this option to select drivers for MXS FB devices
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config DRM_MXSFB
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tristate "i.MX23/i.MX28/i.MX6SX MXSFB LCD controller"
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depends on DRM && OF
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depends on COMMON_CLK
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select DRM_MXS
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select DRM_KMS_HELPER
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select DRM_KMS_FB_HELPER
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select DRM_KMS_CMA_HELPER
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help
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Choose this option if you have an i.MX23/i.MX28/i.MX6SX MXSFB
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LCD controller.
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If M is selected the module will be called mxsfb.
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2
drivers/gpu/drm/mxsfb/Makefile
Normal file
2
drivers/gpu/drm/mxsfb/Makefile
Normal file
@ -0,0 +1,2 @@
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mxsfb-y := mxsfb_drv.o mxsfb_crtc.o mxsfb_out.o
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obj-$(CONFIG_DRM_MXSFB) += mxsfb.o
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241
drivers/gpu/drm/mxsfb/mxsfb_crtc.c
Normal file
241
drivers/gpu/drm/mxsfb/mxsfb_crtc.c
Normal file
@ -0,0 +1,241 @@
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/*
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* Copyright (C) 2016 Marek Vasut <marex@denx.de>
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*
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* This code is based on drivers/video/fbdev/mxsfb.c :
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* Copyright (C) 2010 Juergen Beisert, Pengutronix
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* Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_fb_cma_helper.h>
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#include <drm/drm_gem_cma_helper.h>
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#include <drm/drm_of.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_simple_kms_helper.h>
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#include <linux/clk.h>
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#include <linux/iopoll.h>
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#include <linux/of_graph.h>
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#include <linux/platform_data/simplefb.h>
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#include <video/videomode.h>
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#include "mxsfb_drv.h"
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#include "mxsfb_regs.h"
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static u32 set_hsync_pulse_width(struct mxsfb_drm_private *mxsfb, u32 val)
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{
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return (val & mxsfb->devdata->hs_wdth_mask) <<
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mxsfb->devdata->hs_wdth_shift;
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}
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/* Setup the MXSFB registers for decoding the pixels out of the framebuffer */
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static int mxsfb_set_pixel_fmt(struct mxsfb_drm_private *mxsfb)
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{
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struct drm_crtc *crtc = &mxsfb->pipe.crtc;
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struct drm_device *drm = crtc->dev;
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const u32 format = crtc->primary->state->fb->pixel_format;
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u32 ctrl, ctrl1;
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ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER;
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/*
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* WARNING: The bus width, CTRL_SET_BUS_WIDTH(), is configured to
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* match the selected mode here. This differs from the original
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* MXSFB driver, which had the option to configure the bus width
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* to arbitrary value. This limitation should not pose an issue.
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*/
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/* CTRL1 contains IRQ config and status bits, preserve those. */
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ctrl1 = readl(mxsfb->base + LCDC_CTRL1);
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ctrl1 &= CTRL1_CUR_FRAME_DONE_IRQ_EN | CTRL1_CUR_FRAME_DONE_IRQ;
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switch (format) {
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case DRM_FORMAT_RGB565:
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dev_dbg(drm->dev, "Setting up RGB565 mode\n");
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ctrl |= CTRL_SET_BUS_WIDTH(STMLCDIF_16BIT);
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ctrl |= CTRL_SET_WORD_LENGTH(0);
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ctrl1 |= CTRL1_SET_BYTE_PACKAGING(0xf);
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break;
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case DRM_FORMAT_XRGB8888:
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dev_dbg(drm->dev, "Setting up XRGB8888 mode\n");
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ctrl |= CTRL_SET_BUS_WIDTH(STMLCDIF_24BIT);
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ctrl |= CTRL_SET_WORD_LENGTH(3);
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/* Do not use packed pixels = one pixel per word instead. */
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ctrl1 |= CTRL1_SET_BYTE_PACKAGING(0x7);
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break;
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default:
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dev_err(drm->dev, "Unhandled pixel format %08x\n", format);
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return -EINVAL;
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}
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writel(ctrl1, mxsfb->base + LCDC_CTRL1);
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writel(ctrl, mxsfb->base + LCDC_CTRL);
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return 0;
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}
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static void mxsfb_enable_controller(struct mxsfb_drm_private *mxsfb)
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{
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u32 reg;
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if (mxsfb->clk_disp_axi)
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clk_prepare_enable(mxsfb->clk_disp_axi);
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clk_prepare_enable(mxsfb->clk);
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mxsfb_enable_axi_clk(mxsfb);
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/* If it was disabled, re-enable the mode again */
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writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_SET);
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/* Enable the SYNC signals first, then the DMA engine */
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reg = readl(mxsfb->base + LCDC_VDCTRL4);
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reg |= VDCTRL4_SYNC_SIGNALS_ON;
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writel(reg, mxsfb->base + LCDC_VDCTRL4);
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writel(CTRL_RUN, mxsfb->base + LCDC_CTRL + REG_SET);
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}
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static void mxsfb_disable_controller(struct mxsfb_drm_private *mxsfb)
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{
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u32 reg;
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/*
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* Even if we disable the controller here, it will still continue
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* until its FIFOs are running out of data
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*/
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writel(CTRL_DOTCLK_MODE, mxsfb->base + LCDC_CTRL + REG_CLR);
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readl_poll_timeout(mxsfb->base + LCDC_CTRL, reg, !(reg & CTRL_RUN),
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0, 1000);
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reg = readl(mxsfb->base + LCDC_VDCTRL4);
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reg &= ~VDCTRL4_SYNC_SIGNALS_ON;
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writel(reg, mxsfb->base + LCDC_VDCTRL4);
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mxsfb_disable_axi_clk(mxsfb);
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clk_disable_unprepare(mxsfb->clk);
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if (mxsfb->clk_disp_axi)
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clk_disable_unprepare(mxsfb->clk_disp_axi);
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}
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static void mxsfb_crtc_mode_set_nofb(struct mxsfb_drm_private *mxsfb)
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{
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struct drm_display_mode *m = &mxsfb->pipe.crtc.state->adjusted_mode;
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const u32 bus_flags = mxsfb->connector.display_info.bus_flags;
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u32 vdctrl0, vsync_pulse_len, hsync_pulse_len;
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int err;
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/*
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* It seems, you can't re-program the controller if it is still
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* running. This may lead to shifted pictures (FIFO issue?), so
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* first stop the controller and drain its FIFOs.
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*/
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mxsfb_enable_axi_clk(mxsfb);
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|
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/* Clear the FIFOs */
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writel(CTRL1_FIFO_CLEAR, mxsfb->base + LCDC_CTRL1 + REG_SET);
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err = mxsfb_set_pixel_fmt(mxsfb);
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if (err)
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return;
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clk_set_rate(mxsfb->clk, m->crtc_clock * 1000);
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writel(TRANSFER_COUNT_SET_VCOUNT(m->crtc_vdisplay) |
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TRANSFER_COUNT_SET_HCOUNT(m->crtc_hdisplay),
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mxsfb->base + mxsfb->devdata->transfer_count);
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||||
vsync_pulse_len = m->crtc_vsync_end - m->crtc_vsync_start;
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|
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vdctrl0 = VDCTRL0_ENABLE_PRESENT | /* Always in DOTCLOCK mode */
|
||||
VDCTRL0_VSYNC_PERIOD_UNIT |
|
||||
VDCTRL0_VSYNC_PULSE_WIDTH_UNIT |
|
||||
VDCTRL0_SET_VSYNC_PULSE_WIDTH(vsync_pulse_len);
|
||||
if (m->flags & DRM_MODE_FLAG_PHSYNC)
|
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vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH;
|
||||
if (m->flags & DRM_MODE_FLAG_PVSYNC)
|
||||
vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH;
|
||||
if (bus_flags & DRM_BUS_FLAG_DE_HIGH)
|
||||
vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
|
||||
if (bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
|
||||
vdctrl0 |= VDCTRL0_DOTCLK_ACT_FALLING;
|
||||
|
||||
writel(vdctrl0, mxsfb->base + LCDC_VDCTRL0);
|
||||
|
||||
/* Frame length in lines. */
|
||||
writel(m->crtc_vtotal, mxsfb->base + LCDC_VDCTRL1);
|
||||
|
||||
/* Line length in units of clocks or pixels. */
|
||||
hsync_pulse_len = m->crtc_hsync_end - m->crtc_hsync_start;
|
||||
writel(set_hsync_pulse_width(mxsfb, hsync_pulse_len) |
|
||||
VDCTRL2_SET_HSYNC_PERIOD(m->crtc_htotal),
|
||||
mxsfb->base + LCDC_VDCTRL2);
|
||||
|
||||
writel(SET_HOR_WAIT_CNT(m->crtc_hblank_end - m->crtc_hsync_end) |
|
||||
SET_VERT_WAIT_CNT(m->crtc_vblank_end - m->crtc_vsync_end),
|
||||
mxsfb->base + LCDC_VDCTRL3);
|
||||
|
||||
writel(SET_DOTCLK_H_VALID_DATA_CNT(m->hdisplay),
|
||||
mxsfb->base + LCDC_VDCTRL4);
|
||||
|
||||
mxsfb_disable_axi_clk(mxsfb);
|
||||
}
|
||||
|
||||
void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb)
|
||||
{
|
||||
mxsfb_crtc_mode_set_nofb(mxsfb);
|
||||
mxsfb_enable_controller(mxsfb);
|
||||
}
|
||||
|
||||
void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb)
|
||||
{
|
||||
mxsfb_disable_controller(mxsfb);
|
||||
}
|
||||
|
||||
void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb,
|
||||
struct drm_plane_state *state)
|
||||
{
|
||||
struct drm_simple_display_pipe *pipe = &mxsfb->pipe;
|
||||
struct drm_crtc *crtc = &pipe->crtc;
|
||||
struct drm_framebuffer *fb = pipe->plane.state->fb;
|
||||
struct drm_pending_vblank_event *event;
|
||||
struct drm_gem_cma_object *gem;
|
||||
|
||||
if (!crtc)
|
||||
return;
|
||||
|
||||
spin_lock_irq(&crtc->dev->event_lock);
|
||||
event = crtc->state->event;
|
||||
if (event) {
|
||||
crtc->state->event = NULL;
|
||||
|
||||
if (drm_crtc_vblank_get(crtc) == 0) {
|
||||
drm_crtc_arm_vblank_event(crtc, event);
|
||||
} else {
|
||||
drm_crtc_send_vblank_event(crtc, event);
|
||||
}
|
||||
}
|
||||
spin_unlock_irq(&crtc->dev->event_lock);
|
||||
|
||||
if (!fb)
|
||||
return;
|
||||
|
||||
gem = drm_fb_cma_get_gem_obj(fb, 0);
|
||||
|
||||
mxsfb_enable_axi_clk(mxsfb);
|
||||
writel(gem->paddr, mxsfb->base + mxsfb->devdata->next_buf);
|
||||
mxsfb_disable_axi_clk(mxsfb);
|
||||
}
|
||||
444
drivers/gpu/drm/mxsfb/mxsfb_drv.c
Normal file
444
drivers/gpu/drm/mxsfb/mxsfb_drv.c
Normal file
@ -0,0 +1,444 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Marek Vasut <marex@denx.de>
|
||||
*
|
||||
* This code is based on drivers/video/fbdev/mxsfb.c :
|
||||
* Copyright (C) 2010 Juergen Beisert, Pengutronix
|
||||
* Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
|
||||
* Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/component.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_graph.h>
|
||||
#include <linux/of_reserved_mem.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/reservation.h>
|
||||
|
||||
#include <drm/drmP.h>
|
||||
#include <drm/drm_atomic.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
#include <drm/drm_crtc.h>
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
#include <drm/drm_fb_helper.h>
|
||||
#include <drm/drm_fb_cma_helper.h>
|
||||
#include <drm/drm_gem_cma_helper.h>
|
||||
#include <drm/drm_of.h>
|
||||
#include <drm/drm_panel.h>
|
||||
#include <drm/drm_simple_kms_helper.h>
|
||||
|
||||
#include "mxsfb_drv.h"
|
||||
#include "mxsfb_regs.h"
|
||||
|
||||
enum mxsfb_devtype {
|
||||
MXSFB_V3,
|
||||
MXSFB_V4,
|
||||
};
|
||||
|
||||
static const struct mxsfb_devdata mxsfb_devdata[] = {
|
||||
[MXSFB_V3] = {
|
||||
.transfer_count = LCDC_V3_TRANSFER_COUNT,
|
||||
.cur_buf = LCDC_V3_CUR_BUF,
|
||||
.next_buf = LCDC_V3_NEXT_BUF,
|
||||
.debug0 = LCDC_V3_DEBUG0,
|
||||
.hs_wdth_mask = 0xff,
|
||||
.hs_wdth_shift = 24,
|
||||
.ipversion = 3,
|
||||
},
|
||||
[MXSFB_V4] = {
|
||||
.transfer_count = LCDC_V4_TRANSFER_COUNT,
|
||||
.cur_buf = LCDC_V4_CUR_BUF,
|
||||
.next_buf = LCDC_V4_NEXT_BUF,
|
||||
.debug0 = LCDC_V4_DEBUG0,
|
||||
.hs_wdth_mask = 0x3fff,
|
||||
.hs_wdth_shift = 18,
|
||||
.ipversion = 4,
|
||||
},
|
||||
};
|
||||
|
||||
static const uint32_t mxsfb_formats[] = {
|
||||
DRM_FORMAT_XRGB8888,
|
||||
DRM_FORMAT_RGB565
|
||||
};
|
||||
|
||||
static struct mxsfb_drm_private *
|
||||
drm_pipe_to_mxsfb_drm_private(struct drm_simple_display_pipe *pipe)
|
||||
{
|
||||
return container_of(pipe, struct mxsfb_drm_private, pipe);
|
||||
}
|
||||
|
||||
void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb)
|
||||
{
|
||||
if (mxsfb->clk_axi)
|
||||
clk_prepare_enable(mxsfb->clk_axi);
|
||||
}
|
||||
|
||||
void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb)
|
||||
{
|
||||
if (mxsfb->clk_axi)
|
||||
clk_disable_unprepare(mxsfb->clk_axi);
|
||||
}
|
||||
|
||||
static const struct drm_mode_config_funcs mxsfb_mode_config_funcs = {
|
||||
.fb_create = drm_fb_cma_create,
|
||||
.atomic_check = drm_atomic_helper_check,
|
||||
.atomic_commit = drm_atomic_helper_commit,
|
||||
};
|
||||
|
||||
static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe,
|
||||
struct drm_crtc_state *crtc_state)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
|
||||
|
||||
mxsfb_crtc_enable(mxsfb);
|
||||
}
|
||||
|
||||
static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
|
||||
|
||||
mxsfb_crtc_disable(mxsfb);
|
||||
}
|
||||
|
||||
static void mxsfb_pipe_update(struct drm_simple_display_pipe *pipe,
|
||||
struct drm_plane_state *plane_state)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe);
|
||||
|
||||
mxsfb_plane_atomic_update(mxsfb, plane_state);
|
||||
}
|
||||
|
||||
static int mxsfb_pipe_prepare_fb(struct drm_simple_display_pipe *pipe,
|
||||
struct drm_plane_state *plane_state)
|
||||
{
|
||||
return drm_fb_cma_prepare_fb(&pipe->plane, plane_state);
|
||||
}
|
||||
|
||||
struct drm_simple_display_pipe_funcs mxsfb_funcs = {
|
||||
.enable = mxsfb_pipe_enable,
|
||||
.disable = mxsfb_pipe_disable,
|
||||
.update = mxsfb_pipe_update,
|
||||
.prepare_fb = mxsfb_pipe_prepare_fb,
|
||||
};
|
||||
|
||||
static int mxsfb_load(struct drm_device *drm, unsigned long flags)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(drm->dev);
|
||||
struct mxsfb_drm_private *mxsfb;
|
||||
struct resource *res;
|
||||
int ret;
|
||||
|
||||
mxsfb = devm_kzalloc(&pdev->dev, sizeof(*mxsfb), GFP_KERNEL);
|
||||
if (!mxsfb)
|
||||
return -ENOMEM;
|
||||
|
||||
drm->dev_private = mxsfb;
|
||||
mxsfb->devdata = &mxsfb_devdata[pdev->id_entry->driver_data];
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
mxsfb->base = devm_ioremap_resource(drm->dev, res);
|
||||
if (IS_ERR(mxsfb->base))
|
||||
return PTR_ERR(mxsfb->base);
|
||||
|
||||
mxsfb->clk = devm_clk_get(drm->dev, NULL);
|
||||
if (IS_ERR(mxsfb->clk))
|
||||
return PTR_ERR(mxsfb->clk);
|
||||
|
||||
mxsfb->clk_axi = devm_clk_get(drm->dev, "axi");
|
||||
if (IS_ERR(mxsfb->clk_axi))
|
||||
mxsfb->clk_axi = NULL;
|
||||
|
||||
mxsfb->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi");
|
||||
if (IS_ERR(mxsfb->clk_disp_axi))
|
||||
mxsfb->clk_disp_axi = NULL;
|
||||
|
||||
ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pm_runtime_enable(drm->dev);
|
||||
|
||||
ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
|
||||
if (ret < 0) {
|
||||
dev_err(drm->dev, "Failed to initialise vblank\n");
|
||||
goto err_vblank;
|
||||
}
|
||||
|
||||
/* Modeset init */
|
||||
drm_mode_config_init(drm);
|
||||
|
||||
ret = mxsfb_create_output(drm);
|
||||
if (ret < 0) {
|
||||
dev_err(drm->dev, "Failed to create outputs\n");
|
||||
goto err_vblank;
|
||||
}
|
||||
|
||||
ret = drm_simple_display_pipe_init(drm, &mxsfb->pipe, &mxsfb_funcs,
|
||||
mxsfb_formats, ARRAY_SIZE(mxsfb_formats),
|
||||
&mxsfb->connector);
|
||||
if (ret < 0) {
|
||||
dev_err(drm->dev, "Cannot setup simple display pipe\n");
|
||||
goto err_vblank;
|
||||
}
|
||||
|
||||
ret = drm_panel_attach(mxsfb->panel, &mxsfb->connector);
|
||||
if (ret) {
|
||||
dev_err(drm->dev, "Cannot connect panel\n");
|
||||
goto err_vblank;
|
||||
}
|
||||
|
||||
drm->mode_config.min_width = MXSFB_MIN_XRES;
|
||||
drm->mode_config.min_height = MXSFB_MIN_YRES;
|
||||
drm->mode_config.max_width = MXSFB_MAX_XRES;
|
||||
drm->mode_config.max_height = MXSFB_MAX_YRES;
|
||||
drm->mode_config.funcs = &mxsfb_mode_config_funcs;
|
||||
|
||||
drm_mode_config_reset(drm);
|
||||
|
||||
pm_runtime_get_sync(drm->dev);
|
||||
ret = drm_irq_install(drm, platform_get_irq(pdev, 0));
|
||||
pm_runtime_put_sync(drm->dev);
|
||||
|
||||
if (ret < 0) {
|
||||
dev_err(drm->dev, "Failed to install IRQ handler\n");
|
||||
goto err_irq;
|
||||
}
|
||||
|
||||
drm_kms_helper_poll_init(drm);
|
||||
|
||||
mxsfb->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
|
||||
drm->mode_config.num_connector);
|
||||
if (IS_ERR(mxsfb->fbdev)) {
|
||||
mxsfb->fbdev = NULL;
|
||||
dev_err(drm->dev, "Failed to init FB CMA area\n");
|
||||
goto err_cma;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, drm);
|
||||
|
||||
drm_helper_hpd_irq_event(drm);
|
||||
|
||||
return 0;
|
||||
|
||||
err_cma:
|
||||
drm_irq_uninstall(drm);
|
||||
err_irq:
|
||||
drm_panel_detach(mxsfb->panel);
|
||||
err_vblank:
|
||||
pm_runtime_disable(drm->dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void mxsfb_unload(struct drm_device *drm)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm->dev_private;
|
||||
|
||||
if (mxsfb->fbdev)
|
||||
drm_fbdev_cma_fini(mxsfb->fbdev);
|
||||
|
||||
drm_kms_helper_poll_fini(drm);
|
||||
drm_mode_config_cleanup(drm);
|
||||
drm_vblank_cleanup(drm);
|
||||
|
||||
pm_runtime_get_sync(drm->dev);
|
||||
drm_irq_uninstall(drm);
|
||||
pm_runtime_put_sync(drm->dev);
|
||||
|
||||
drm->dev_private = NULL;
|
||||
|
||||
pm_runtime_disable(drm->dev);
|
||||
}
|
||||
|
||||
static void mxsfb_lastclose(struct drm_device *drm)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm->dev_private;
|
||||
|
||||
drm_fbdev_cma_restore_mode(mxsfb->fbdev);
|
||||
}
|
||||
|
||||
static int mxsfb_enable_vblank(struct drm_device *drm, unsigned int crtc)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm->dev_private;
|
||||
|
||||
/* Clear and enable VBLANK IRQ */
|
||||
mxsfb_enable_axi_clk(mxsfb);
|
||||
writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
|
||||
writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET);
|
||||
mxsfb_disable_axi_clk(mxsfb);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void mxsfb_disable_vblank(struct drm_device *drm, unsigned int crtc)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm->dev_private;
|
||||
|
||||
/* Disable and clear VBLANK IRQ */
|
||||
mxsfb_enable_axi_clk(mxsfb);
|
||||
writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR);
|
||||
writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
|
||||
mxsfb_disable_axi_clk(mxsfb);
|
||||
}
|
||||
|
||||
static void mxsfb_irq_preinstall(struct drm_device *drm)
|
||||
{
|
||||
mxsfb_disable_vblank(drm, 0);
|
||||
}
|
||||
|
||||
static irqreturn_t mxsfb_irq_handler(int irq, void *data)
|
||||
{
|
||||
struct drm_device *drm = data;
|
||||
struct mxsfb_drm_private *mxsfb = drm->dev_private;
|
||||
u32 reg;
|
||||
|
||||
mxsfb_enable_axi_clk(mxsfb);
|
||||
|
||||
reg = readl(mxsfb->base + LCDC_CTRL1);
|
||||
|
||||
if (reg & CTRL1_CUR_FRAME_DONE_IRQ)
|
||||
drm_crtc_handle_vblank(&mxsfb->pipe.crtc);
|
||||
|
||||
writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR);
|
||||
|
||||
mxsfb_disable_axi_clk(mxsfb);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static const struct file_operations fops = {
|
||||
.owner = THIS_MODULE,
|
||||
.open = drm_open,
|
||||
.release = drm_release,
|
||||
.unlocked_ioctl = drm_ioctl,
|
||||
#ifdef CONFIG_COMPAT
|
||||
.compat_ioctl = drm_compat_ioctl,
|
||||
#endif
|
||||
.poll = drm_poll,
|
||||
.read = drm_read,
|
||||
.llseek = noop_llseek,
|
||||
.mmap = drm_gem_cma_mmap,
|
||||
};
|
||||
|
||||
static struct drm_driver mxsfb_driver = {
|
||||
.driver_features = DRIVER_GEM | DRIVER_MODESET |
|
||||
DRIVER_PRIME | DRIVER_ATOMIC |
|
||||
DRIVER_HAVE_IRQ,
|
||||
.lastclose = mxsfb_lastclose,
|
||||
.irq_handler = mxsfb_irq_handler,
|
||||
.irq_preinstall = mxsfb_irq_preinstall,
|
||||
.irq_uninstall = mxsfb_irq_preinstall,
|
||||
.get_vblank_counter = drm_vblank_no_hw_counter,
|
||||
.enable_vblank = mxsfb_enable_vblank,
|
||||
.disable_vblank = mxsfb_disable_vblank,
|
||||
.gem_free_object = drm_gem_cma_free_object,
|
||||
.gem_vm_ops = &drm_gem_cma_vm_ops,
|
||||
.dumb_create = drm_gem_cma_dumb_create,
|
||||
.dumb_map_offset = drm_gem_cma_dumb_map_offset,
|
||||
.dumb_destroy = drm_gem_dumb_destroy,
|
||||
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
||||
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
||||
.gem_prime_export = drm_gem_prime_export,
|
||||
.gem_prime_import = drm_gem_prime_import,
|
||||
.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
|
||||
.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
|
||||
.gem_prime_vmap = drm_gem_cma_prime_vmap,
|
||||
.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
|
||||
.gem_prime_mmap = drm_gem_cma_prime_mmap,
|
||||
.fops = &fops,
|
||||
.name = "mxsfb-drm",
|
||||
.desc = "MXSFB Controller DRM",
|
||||
.date = "20160824",
|
||||
.major = 1,
|
||||
.minor = 0,
|
||||
};
|
||||
|
||||
static const struct platform_device_id mxsfb_devtype[] = {
|
||||
{ .name = "imx23-fb", .driver_data = MXSFB_V3, },
|
||||
{ .name = "imx28-fb", .driver_data = MXSFB_V4, },
|
||||
{ .name = "imx6sx-fb", .driver_data = MXSFB_V4, },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(platform, mxsfb_devtype);
|
||||
|
||||
static const struct of_device_id mxsfb_dt_ids[] = {
|
||||
{ .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], },
|
||||
{ .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], },
|
||||
{ .compatible = "fsl,imx6sx-lcdif", .data = &mxsfb_devtype[2], },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, mxsfb_dt_ids);
|
||||
|
||||
static int mxsfb_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct drm_device *drm;
|
||||
const struct of_device_id *of_id =
|
||||
of_match_device(mxsfb_dt_ids, &pdev->dev);
|
||||
int ret;
|
||||
|
||||
if (!pdev->dev.of_node)
|
||||
return -ENODEV;
|
||||
|
||||
if (of_id)
|
||||
pdev->id_entry = of_id->data;
|
||||
|
||||
drm = drm_dev_alloc(&mxsfb_driver, &pdev->dev);
|
||||
if (!drm)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = mxsfb_load(drm, 0);
|
||||
if (ret)
|
||||
goto err_free;
|
||||
|
||||
ret = drm_dev_register(drm, 0);
|
||||
if (ret)
|
||||
goto err_unload;
|
||||
|
||||
return 0;
|
||||
|
||||
err_unload:
|
||||
mxsfb_unload(drm);
|
||||
err_free:
|
||||
drm_dev_unref(drm);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mxsfb_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct drm_device *drm = platform_get_drvdata(pdev);
|
||||
|
||||
drm_dev_unregister(drm);
|
||||
mxsfb_unload(drm);
|
||||
drm_dev_unref(drm);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver mxsfb_platform_driver = {
|
||||
.probe = mxsfb_probe,
|
||||
.remove = mxsfb_remove,
|
||||
.id_table = mxsfb_devtype,
|
||||
.driver = {
|
||||
.name = "mxsfb",
|
||||
.of_match_table = mxsfb_dt_ids,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(mxsfb_platform_driver);
|
||||
|
||||
MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
|
||||
MODULE_DESCRIPTION("Freescale MXS DRM/KMS driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
54
drivers/gpu/drm/mxsfb/mxsfb_drv.h
Normal file
54
drivers/gpu/drm/mxsfb/mxsfb_drv.h
Normal file
@ -0,0 +1,54 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Marek Vasut <marex@denx.de>
|
||||
*
|
||||
* i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __MXSFB_DRV_H__
|
||||
#define __MXSFB_DRV_H__
|
||||
|
||||
struct mxsfb_devdata {
|
||||
unsigned int transfer_count;
|
||||
unsigned int cur_buf;
|
||||
unsigned int next_buf;
|
||||
unsigned int debug0;
|
||||
unsigned int hs_wdth_mask;
|
||||
unsigned int hs_wdth_shift;
|
||||
unsigned int ipversion;
|
||||
};
|
||||
|
||||
struct mxsfb_drm_private {
|
||||
const struct mxsfb_devdata *devdata;
|
||||
|
||||
void __iomem *base; /* registers */
|
||||
struct clk *clk;
|
||||
struct clk *clk_axi;
|
||||
struct clk *clk_disp_axi;
|
||||
|
||||
struct drm_simple_display_pipe pipe;
|
||||
struct drm_connector connector;
|
||||
struct drm_panel *panel;
|
||||
struct drm_fbdev_cma *fbdev;
|
||||
};
|
||||
|
||||
int mxsfb_setup_crtc(struct drm_device *dev);
|
||||
int mxsfb_create_output(struct drm_device *dev);
|
||||
|
||||
void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb);
|
||||
void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb);
|
||||
|
||||
void mxsfb_crtc_enable(struct mxsfb_drm_private *mxsfb);
|
||||
void mxsfb_crtc_disable(struct mxsfb_drm_private *mxsfb);
|
||||
void mxsfb_plane_atomic_update(struct mxsfb_drm_private *mxsfb,
|
||||
struct drm_plane_state *state);
|
||||
|
||||
#endif /* __MXSFB_DRV_H__ */
|
||||
131
drivers/gpu/drm/mxsfb/mxsfb_out.c
Normal file
131
drivers/gpu/drm/mxsfb/mxsfb_out.c
Normal file
@ -0,0 +1,131 @@
|
||||
/*
|
||||
* Copyright (C) 2016 Marek Vasut <marex@denx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#include <linux/of_graph.h>
|
||||
|
||||
#include <drm/drm_atomic.h>
|
||||
#include <drm/drm_atomic_helper.h>
|
||||
#include <drm/drm_crtc.h>
|
||||
#include <drm/drm_crtc_helper.h>
|
||||
#include <drm/drm_fb_cma_helper.h>
|
||||
#include <drm/drm_gem_cma_helper.h>
|
||||
#include <drm/drm_panel.h>
|
||||
#include <drm/drm_plane_helper.h>
|
||||
#include <drm/drm_simple_kms_helper.h>
|
||||
#include <drm/drmP.h>
|
||||
|
||||
#include "mxsfb_drv.h"
|
||||
|
||||
static struct mxsfb_drm_private *
|
||||
drm_connector_to_mxsfb_drm_private(struct drm_connector *connector)
|
||||
{
|
||||
return container_of(connector, struct mxsfb_drm_private, connector);
|
||||
}
|
||||
|
||||
static int mxsfb_panel_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb =
|
||||
drm_connector_to_mxsfb_drm_private(connector);
|
||||
|
||||
if (mxsfb->panel)
|
||||
return mxsfb->panel->funcs->get_modes(mxsfb->panel);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct
|
||||
drm_connector_helper_funcs mxsfb_panel_connector_helper_funcs = {
|
||||
.get_modes = mxsfb_panel_get_modes,
|
||||
};
|
||||
|
||||
static enum drm_connector_status
|
||||
mxsfb_panel_connector_detect(struct drm_connector *connector, bool force)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb =
|
||||
drm_connector_to_mxsfb_drm_private(connector);
|
||||
|
||||
if (mxsfb->panel)
|
||||
return connector_status_connected;
|
||||
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
|
||||
static void mxsfb_panel_connector_destroy(struct drm_connector *connector)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb =
|
||||
drm_connector_to_mxsfb_drm_private(connector);
|
||||
|
||||
if (mxsfb->panel)
|
||||
drm_panel_detach(mxsfb->panel);
|
||||
|
||||
drm_connector_unregister(connector);
|
||||
drm_connector_cleanup(connector);
|
||||
}
|
||||
|
||||
static const struct drm_connector_funcs mxsfb_panel_connector_funcs = {
|
||||
.dpms = drm_atomic_helper_connector_dpms,
|
||||
.detect = mxsfb_panel_connector_detect,
|
||||
.fill_modes = drm_helper_probe_single_connector_modes,
|
||||
.destroy = mxsfb_panel_connector_destroy,
|
||||
.reset = drm_atomic_helper_connector_reset,
|
||||
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
|
||||
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
|
||||
};
|
||||
|
||||
static int mxsfb_attach_endpoint(struct drm_device *drm,
|
||||
const struct of_endpoint *ep)
|
||||
{
|
||||
struct mxsfb_drm_private *mxsfb = drm->dev_private;
|
||||
struct device_node *np;
|
||||
struct drm_panel *panel;
|
||||
int ret = -EPROBE_DEFER;
|
||||
|
||||
np = of_graph_get_remote_port_parent(ep->local_node);
|
||||
panel = of_drm_find_panel(np);
|
||||
of_node_put(np);
|
||||
|
||||
if (!panel)
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
mxsfb->connector.dpms = DRM_MODE_DPMS_OFF;
|
||||
mxsfb->connector.polled = 0;
|
||||
drm_connector_helper_add(&mxsfb->connector,
|
||||
&mxsfb_panel_connector_helper_funcs);
|
||||
ret = drm_connector_init(drm, &mxsfb->connector,
|
||||
&mxsfb_panel_connector_funcs,
|
||||
DRM_MODE_CONNECTOR_Unknown);
|
||||
if (!ret)
|
||||
mxsfb->panel = panel;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int mxsfb_create_output(struct drm_device *drm)
|
||||
{
|
||||
struct device_node *ep_np = NULL;
|
||||
struct of_endpoint ep;
|
||||
int ret;
|
||||
|
||||
for_each_endpoint_of_node(drm->dev->of_node, ep_np) {
|
||||
ret = of_graph_parse_endpoint(ep_np, &ep);
|
||||
if (!ret)
|
||||
ret = mxsfb_attach_endpoint(drm, &ep);
|
||||
|
||||
if (ret) {
|
||||
of_node_put(ep_np);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
114
drivers/gpu/drm/mxsfb/mxsfb_regs.h
Normal file
114
drivers/gpu/drm/mxsfb/mxsfb_regs.h
Normal file
@ -0,0 +1,114 @@
|
||||
/*
|
||||
* Copyright (C) 2010 Juergen Beisert, Pengutronix
|
||||
* Copyright (C) 2016 Marek Vasut <marex@denx.de>
|
||||
*
|
||||
* i.MX23/i.MX28/i.MX6SX MXSFB LCD controller driver.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __MXSFB_REGS_H__
|
||||
#define __MXSFB_REGS_H__
|
||||
|
||||
#define REG_SET 4
|
||||
#define REG_CLR 8
|
||||
|
||||
#define LCDC_CTRL 0x00
|
||||
#define LCDC_CTRL1 0x10
|
||||
#define LCDC_V3_TRANSFER_COUNT 0x20
|
||||
#define LCDC_V4_TRANSFER_COUNT 0x30
|
||||
#define LCDC_V4_CUR_BUF 0x40
|
||||
#define LCDC_V4_NEXT_BUF 0x50
|
||||
#define LCDC_V3_CUR_BUF 0x30
|
||||
#define LCDC_V3_NEXT_BUF 0x40
|
||||
#define LCDC_VDCTRL0 0x70
|
||||
#define LCDC_VDCTRL1 0x80
|
||||
#define LCDC_VDCTRL2 0x90
|
||||
#define LCDC_VDCTRL3 0xa0
|
||||
#define LCDC_VDCTRL4 0xb0
|
||||
#define LCDC_V4_DEBUG0 0x1d0
|
||||
#define LCDC_V3_DEBUG0 0x1f0
|
||||
|
||||
#define CTRL_SFTRST (1 << 31)
|
||||
#define CTRL_CLKGATE (1 << 30)
|
||||
#define CTRL_BYPASS_COUNT (1 << 19)
|
||||
#define CTRL_VSYNC_MODE (1 << 18)
|
||||
#define CTRL_DOTCLK_MODE (1 << 17)
|
||||
#define CTRL_DATA_SELECT (1 << 16)
|
||||
#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10)
|
||||
#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3)
|
||||
#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8)
|
||||
#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3)
|
||||
#define CTRL_MASTER (1 << 5)
|
||||
#define CTRL_DF16 (1 << 3)
|
||||
#define CTRL_DF18 (1 << 2)
|
||||
#define CTRL_DF24 (1 << 1)
|
||||
#define CTRL_RUN (1 << 0)
|
||||
|
||||
#define CTRL1_FIFO_CLEAR (1 << 21)
|
||||
#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16)
|
||||
#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf)
|
||||
#define CTRL1_CUR_FRAME_DONE_IRQ_EN (1 << 13)
|
||||
#define CTRL1_CUR_FRAME_DONE_IRQ (1 << 9)
|
||||
|
||||
#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16)
|
||||
#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff)
|
||||
#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff)
|
||||
#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff)
|
||||
|
||||
#define VDCTRL0_ENABLE_PRESENT (1 << 28)
|
||||
#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27)
|
||||
#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26)
|
||||
#define VDCTRL0_DOTCLK_ACT_FALLING (1 << 25)
|
||||
#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24)
|
||||
#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21)
|
||||
#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20)
|
||||
#define VDCTRL0_HALF_LINE (1 << 19)
|
||||
#define VDCTRL0_HALF_LINE_MODE (1 << 18)
|
||||
#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
|
||||
#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff)
|
||||
|
||||
#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
|
||||
#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff)
|
||||
|
||||
#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29)
|
||||
#define VDCTRL3_VSYNC_ONLY (1 << 28)
|
||||
#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16)
|
||||
#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff)
|
||||
#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff)
|
||||
#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff)
|
||||
|
||||
#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */
|
||||
#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */
|
||||
#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18)
|
||||
#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff)
|
||||
|
||||
#define DEBUG0_HSYNC (1 < 26)
|
||||
#define DEBUG0_VSYNC (1 < 25)
|
||||
|
||||
#define MXSFB_MIN_XRES 120
|
||||
#define MXSFB_MIN_YRES 120
|
||||
#define MXSFB_MAX_XRES 0xffff
|
||||
#define MXSFB_MAX_YRES 0xffff
|
||||
|
||||
#define RED 0
|
||||
#define GREEN 1
|
||||
#define BLUE 2
|
||||
#define TRANSP 3
|
||||
|
||||
#define STMLCDIF_8BIT 1 /* pixel data bus to the display is of 8 bit width */
|
||||
#define STMLCDIF_16BIT 0 /* pixel data bus to the display is of 16 bit width */
|
||||
#define STMLCDIF_18BIT 2 /* pixel data bus to the display is of 18 bit width */
|
||||
#define STMLCDIF_24BIT 3 /* pixel data bus to the display is of 24 bit width */
|
||||
|
||||
#define MXSFB_SYNC_DATA_ENABLE_HIGH_ACT (1 << 6)
|
||||
#define MXSFB_SYNC_DOTCLK_FALLING_ACT (1 << 7) /* negative edge sampling */
|
||||
|
||||
#endif /* __MXSFB_REGS_H__ */
|
||||
Loading…
Reference in New Issue
Block a user