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arm64: dts: meson: fix g12a buses

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Fix apb, cbus, hiu and periph regions which are not aligned
with the documentation and the information provided by Amlogic

Fixes: 9c8c52f7cb ("arm64: dts: meson-g12a: add initial g12a s905d2 SoC DT support")
Cc: Jianxin Pan <jianxin.pan@amlogic.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Jerome Brunet 2019-02-01 14:37:32 +01:00 committed by Kevin Hilman
parent 9ab2d15ce1
commit 503f5fed1c
1 changed files with 24 additions and 22 deletions
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46
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
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@ -78,20 +78,28 @@ soc {
#size-cells = <2>;
ranges;
periphs: periphs@ff634000 {
apb: bus@ff600000 {
compatible = "simple-bus";
reg = <0x0 0xff634000 0x0 0x2000>;
reg = <0x0 0xff600000 0x0 0x200000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
};
ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
hiubus: bus@ff63c000 {
compatible = "simple-bus";
reg = <0x0 0xff63c000 0x0 0x1c00>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
periphs: bus@34400 {
compatible = "simple-bus";
reg = <0x0 0x34400 0x0 0x400>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
};
hiu: bus@3c000 {
compatible = "simple-bus";
reg = <0x0 0x3c000 0x0 0x1400>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
};
};
aobus: bus@ff800000 {
@ -102,7 +110,8 @@ aobus: bus@ff800000 {
ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
uart_AO: serial@3000 {
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x3000 0x0 0x18>;
interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
@ -111,7 +120,8 @@ uart_AO: serial@3000 {
};
uart_AO_B: serial@4000 {
compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
compatible = "amlogic,meson-gx-uart",
"amlogic,meson-ao-uart";
reg = <0x0 0x4000 0x0 0x18>;
interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
clocks = <&xtal>, <&xtal>, <&xtal>;
@ -135,18 +145,10 @@ gic: interrupt-controller@ffc01000 {
cbus: bus@ffd00000 {
compatible = "simple-bus";
reg = <0x0 0xffd00000 0x0 0x25000>;
reg = <0x0 0xffd00000 0x0 0x100000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
};
apb: apb@ffe00000 {
compatible = "simple-bus";
reg = <0x0 0xffe00000 0x0 0x200000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
};
};