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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 18:06:40 +07:00
dmaengine: hdmac: Split device_control
Split the device_control callback of the Atmel HDMAC driver to make use of the newly introduced callbacks, that will eventually be used to retrieve slave capabilities. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -972,11 +972,13 @@ atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
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return NULL;
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}
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static int set_runtime_config(struct dma_chan *chan,
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struct dma_slave_config *sconfig)
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static int atc_config(struct dma_chan *chan,
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struct dma_slave_config *sconfig)
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{
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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dev_vdbg(chan2dev(chan), "%s\n", __func__);
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/* Check if it is chan is configured for slave transfers */
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if (!chan->private)
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return -EINVAL;
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@ -989,9 +991,7 @@ static int set_runtime_config(struct dma_chan *chan,
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return 0;
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}
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static int atc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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unsigned long arg)
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static int atc_pause(struct dma_chan *chan)
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{
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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struct at_dma *atdma = to_at_dma(chan->device);
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@ -1000,60 +1000,82 @@ static int atc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
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LIST_HEAD(list);
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dev_vdbg(chan2dev(chan), "atc_control (%d)\n", cmd);
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dev_vdbg(chan2dev(chan), "%s\n", __func__);
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if (cmd == DMA_PAUSE) {
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spin_lock_irqsave(&atchan->lock, flags);
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spin_lock_irqsave(&atchan->lock, flags);
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dma_writel(atdma, CHER, AT_DMA_SUSP(chan_id));
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set_bit(ATC_IS_PAUSED, &atchan->status);
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dma_writel(atdma, CHER, AT_DMA_SUSP(chan_id));
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set_bit(ATC_IS_PAUSED, &atchan->status);
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spin_unlock_irqrestore(&atchan->lock, flags);
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} else if (cmd == DMA_RESUME) {
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if (!atc_chan_is_paused(atchan))
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return 0;
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spin_unlock_irqrestore(&atchan->lock, flags);
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spin_lock_irqsave(&atchan->lock, flags);
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return 0;
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}
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dma_writel(atdma, CHDR, AT_DMA_RES(chan_id));
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clear_bit(ATC_IS_PAUSED, &atchan->status);
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static int atc_resume(struct dma_chan *chan)
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{
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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struct at_dma *atdma = to_at_dma(chan->device);
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int chan_id = atchan->chan_common.chan_id;
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unsigned long flags;
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spin_unlock_irqrestore(&atchan->lock, flags);
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} else if (cmd == DMA_TERMINATE_ALL) {
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struct at_desc *desc, *_desc;
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/*
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* This is only called when something went wrong elsewhere, so
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* we don't really care about the data. Just disable the
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* channel. We still have to poll the channel enable bit due
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* to AHB/HSB limitations.
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*/
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spin_lock_irqsave(&atchan->lock, flags);
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LIST_HEAD(list);
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/* disabling channel: must also remove suspend state */
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dma_writel(atdma, CHDR, AT_DMA_RES(chan_id) | atchan->mask);
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dev_vdbg(chan2dev(chan), "%s\n", __func__);
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/* confirm that this channel is disabled */
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while (dma_readl(atdma, CHSR) & atchan->mask)
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cpu_relax();
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if (!atc_chan_is_paused(atchan))
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return 0;
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/* active_list entries will end up before queued entries */
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list_splice_init(&atchan->queue, &list);
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list_splice_init(&atchan->active_list, &list);
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spin_lock_irqsave(&atchan->lock, flags);
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/* Flush all pending and queued descriptors */
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list_for_each_entry_safe(desc, _desc, &list, desc_node)
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atc_chain_complete(atchan, desc);
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dma_writel(atdma, CHDR, AT_DMA_RES(chan_id));
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clear_bit(ATC_IS_PAUSED, &atchan->status);
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clear_bit(ATC_IS_PAUSED, &atchan->status);
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/* if channel dedicated to cyclic operations, free it */
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clear_bit(ATC_IS_CYCLIC, &atchan->status);
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spin_unlock_irqrestore(&atchan->lock, flags);
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spin_unlock_irqrestore(&atchan->lock, flags);
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} else if (cmd == DMA_SLAVE_CONFIG) {
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return set_runtime_config(chan, (struct dma_slave_config *)arg);
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} else {
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return -ENXIO;
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}
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return 0;
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}
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static int atc_terminate_all(struct dma_chan *chan)
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{
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struct at_dma_chan *atchan = to_at_dma_chan(chan);
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struct at_dma *atdma = to_at_dma(chan->device);
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int chan_id = atchan->chan_common.chan_id;
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struct at_desc *desc, *_desc;
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unsigned long flags;
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LIST_HEAD(list);
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dev_vdbg(chan2dev(chan), "%s\n", __func__);
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/*
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* This is only called when something went wrong elsewhere, so
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* we don't really care about the data. Just disable the
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* channel. We still have to poll the channel enable bit due
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* to AHB/HSB limitations.
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*/
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spin_lock_irqsave(&atchan->lock, flags);
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/* disabling channel: must also remove suspend state */
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dma_writel(atdma, CHDR, AT_DMA_RES(chan_id) | atchan->mask);
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/* confirm that this channel is disabled */
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while (dma_readl(atdma, CHSR) & atchan->mask)
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cpu_relax();
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/* active_list entries will end up before queued entries */
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list_splice_init(&atchan->queue, &list);
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list_splice_init(&atchan->active_list, &list);
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/* Flush all pending and queued descriptors */
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list_for_each_entry_safe(desc, _desc, &list, desc_node)
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atc_chain_complete(atchan, desc);
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clear_bit(ATC_IS_PAUSED, &atchan->status);
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/* if channel dedicated to cyclic operations, free it */
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clear_bit(ATC_IS_CYCLIC, &atchan->status);
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spin_unlock_irqrestore(&atchan->lock, flags);
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return 0;
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}
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@ -1505,7 +1527,10 @@ static int __init at_dma_probe(struct platform_device *pdev)
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/* controller can do slave DMA: can trigger cyclic transfers */
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dma_cap_set(DMA_CYCLIC, atdma->dma_common.cap_mask);
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atdma->dma_common.device_prep_dma_cyclic = atc_prep_dma_cyclic;
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atdma->dma_common.device_control = atc_control;
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atdma->dma_common.device_config = atc_config;
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atdma->dma_common.device_pause = atc_pause;
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atdma->dma_common.device_resume = atc_resume;
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atdma->dma_common.device_terminate_all = atc_terminate_all;
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}
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dma_writel(atdma, EN, AT_DMA_ENABLE);
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@ -1622,7 +1647,7 @@ static void atc_suspend_cyclic(struct at_dma_chan *atchan)
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if (!atc_chan_is_paused(atchan)) {
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dev_warn(chan2dev(chan),
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"cyclic channel not paused, should be done by channel user\n");
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atc_control(chan, DMA_PAUSE, 0);
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atc_pause(chan);
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}
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/* now preserve additional data for cyclic operations */
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