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ASoC: fsl_esai: Set PCRC and PRRC registers at the end of hw_params()
According to Reference Manual -- ESAI Initialization chapter, as the standard procedure of ESAI personal reset, the PCRC and PRRC registers should be remained in its reset value and then configured after T/RCCR and T/RCR configurations's done but before TE/RE's enabling. So this patch moves PCRC and PRRC settings to the end of hw_params(). Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -461,12 +461,6 @@ static int fsl_esai_startup(struct snd_pcm_substream *substream,
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}
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if (!dai->active) {
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/* Reset Port C */
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regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,
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ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO));
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regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,
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ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO));
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/* Set synchronous mode */
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regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR,
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ESAI_SAICR_SYNC, esai_priv->synchronous ?
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@ -526,6 +520,11 @@ static int fsl_esai_hw_params(struct snd_pcm_substream *substream,
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regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val);
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/* Remove ESAI personal reset by configuring ESAI_PCRC and ESAI_PRRC */
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regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,
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ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO));
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regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,
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ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO));
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return 0;
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}
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