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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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pinctrl: sx150x: add support for sx1501, sx1504, sx1505 and sx1507
Untested, register offsets carefully copied from datasheets. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Peter Rosin
Linus Walleij
parent
bba709bd7a
commit
4f5ac8cf0a
@ -6,9 +6,13 @@ pin controller, GPIO, and interrupt bindings.
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Required properties:
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- compatible: should be one of :
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"semtech,sx1501q",
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"semtech,sx1502q",
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"semtech,sx1503q",
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"semtech,sx1504q",
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"semtech,sx1505q",
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"semtech,sx1506q",
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"semtech,sx1507q",
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"semtech,sx1508q",
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"semtech,sx1509q".
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@ -28,7 +32,7 @@ Optional properties :
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- interrupt-controller: Marks the device as a interrupt controller.
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- semtech,probe-reset: Will trigger a reset of the GPIO expander on probe,
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only for sx1508q and sx1509q
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only for sx1507q, sx1508q and sx1509q
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The GPIO expander can optionally be used as an interrupt controller, in
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which case it uses the default two cell specifier.
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@ -43,7 +47,7 @@ Optional properties for pin configuration sub-nodes:
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- bias-pull-down: pull down the pin, except the OSCIO pin
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- bias-pull-pin-default: use pin-default pull state, except the OSCIO pin
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- drive-push-pull: drive actively high and low
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- drive-open-drain: drive with open drain only for sx1508q and sx1509q and except the OSCIO pin
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- drive-open-drain: drive with open drain only for sx1507q, sx1508q and sx1509q and except the OSCIO pin
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- output-low: set the pin to output mode with low level
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- output-high: set the pin to output mode with high level
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@ -116,6 +116,14 @@ struct sx150x_pinctrl {
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const struct sx150x_device_data *data;
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};
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static const struct pinctrl_pin_desc sx150x_4_pins[] = {
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PINCTRL_PIN(0, "gpio0"),
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PINCTRL_PIN(1, "gpio1"),
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PINCTRL_PIN(2, "gpio2"),
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PINCTRL_PIN(3, "gpio3"),
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PINCTRL_PIN(4, "oscio"),
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};
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static const struct pinctrl_pin_desc sx150x_8_pins[] = {
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PINCTRL_PIN(0, "gpio0"),
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PINCTRL_PIN(1, "gpio1"),
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@ -148,6 +156,26 @@ static const struct pinctrl_pin_desc sx150x_16_pins[] = {
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PINCTRL_PIN(16, "oscio"),
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};
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static const struct sx150x_device_data sx1501q_device_data = {
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.model = SX150X_123,
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.reg_pullup = 0x02,
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.reg_pulldn = 0x03,
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.reg_dir = 0x01,
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.reg_data = 0x00,
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.reg_irq_mask = 0x05,
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.reg_irq_src = 0x08,
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.reg_sense = 0x07,
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.pri.x123 = {
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.reg_pld_mode = 0x10,
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.reg_pld_table0 = 0x11,
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.reg_pld_table2 = 0x13,
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.reg_advance = 0xad,
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},
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.ngpios = 4,
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.pins = sx150x_4_pins,
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.npins = 4, /* oscio not available */
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};
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static const struct sx150x_device_data sx1502q_device_data = {
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.model = SX150X_123,
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.reg_pullup = 0x02,
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@ -194,6 +222,47 @@ static const struct sx150x_device_data sx1503q_device_data = {
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.npins = 16, /* oscio not available */
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};
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static const struct sx150x_device_data sx1504q_device_data = {
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.model = SX150X_456,
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.reg_pullup = 0x02,
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.reg_pulldn = 0x03,
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.reg_dir = 0x01,
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.reg_data = 0x00,
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.reg_irq_mask = 0x05,
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.reg_irq_src = 0x08,
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.reg_sense = 0x07,
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.pri.x456 = {
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.reg_pld_mode = 0x10,
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.reg_pld_table0 = 0x11,
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.reg_pld_table2 = 0x13,
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},
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.ngpios = 4,
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.pins = sx150x_4_pins,
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.npins = 4, /* oscio not available */
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};
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static const struct sx150x_device_data sx1505q_device_data = {
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.model = SX150X_456,
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.reg_pullup = 0x02,
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.reg_pulldn = 0x03,
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.reg_dir = 0x01,
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.reg_data = 0x00,
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.reg_irq_mask = 0x05,
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.reg_irq_src = 0x08,
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.reg_sense = 0x06,
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.pri.x456 = {
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.reg_pld_mode = 0x10,
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.reg_pld_table0 = 0x11,
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.reg_pld_table1 = 0x12,
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.reg_pld_table2 = 0x13,
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.reg_pld_table3 = 0x14,
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.reg_pld_table4 = 0x15,
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},
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.ngpios = 8,
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.pins = sx150x_8_pins,
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.npins = 8, /* oscio not available */
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};
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static const struct sx150x_device_data sx1506q_device_data = {
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.model = SX150X_456,
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.reg_pullup = 0x04,
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@ -217,6 +286,27 @@ static const struct sx150x_device_data sx1506q_device_data = {
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.npins = 16, /* oscio not available */
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};
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static const struct sx150x_device_data sx1507q_device_data = {
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.model = SX150X_789,
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.reg_pullup = 0x03,
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.reg_pulldn = 0x04,
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.reg_dir = 0x07,
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.reg_data = 0x08,
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.reg_irq_mask = 0x09,
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.reg_irq_src = 0x0b,
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.reg_sense = 0x0a,
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.pri.x789 = {
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.reg_drain = 0x05,
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.reg_polarity = 0x06,
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.reg_clock = 0x0d,
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.reg_misc = 0x0e,
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.reg_reset = 0x7d,
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},
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.ngpios = 4,
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.pins = sx150x_4_pins,
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.npins = ARRAY_SIZE(sx150x_4_pins),
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};
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static const struct sx150x_device_data sx1508q_device_data = {
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.model = SX150X_789,
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.reg_pullup = 0x03,
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@ -758,18 +848,26 @@ static const struct pinconf_ops sx150x_pinconf_ops = {
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};
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static const struct i2c_device_id sx150x_id[] = {
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{"sx1501q", (kernel_ulong_t) &sx1501q_device_data },
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{"sx1502q", (kernel_ulong_t) &sx1502q_device_data },
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{"sx1503q", (kernel_ulong_t) &sx1503q_device_data },
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{"sx1504q", (kernel_ulong_t) &sx1504q_device_data },
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{"sx1505q", (kernel_ulong_t) &sx1505q_device_data },
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{"sx1506q", (kernel_ulong_t) &sx1506q_device_data },
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{"sx1507q", (kernel_ulong_t) &sx1507q_device_data },
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{"sx1508q", (kernel_ulong_t) &sx1508q_device_data },
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{"sx1509q", (kernel_ulong_t) &sx1509q_device_data },
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{}
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};
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static const struct of_device_id sx150x_of_match[] = {
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{ .compatible = "semtech,sx1501q", .data = &sx1501q_device_data },
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{ .compatible = "semtech,sx1502q", .data = &sx1502q_device_data },
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{ .compatible = "semtech,sx1503q", .data = &sx1503q_device_data },
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{ .compatible = "semtech,sx1504q", .data = &sx1504q_device_data },
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{ .compatible = "semtech,sx1505q", .data = &sx1505q_device_data },
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{ .compatible = "semtech,sx1506q", .data = &sx1506q_device_data },
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{ .compatible = "semtech,sx1507q", .data = &sx1507q_device_data },
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{ .compatible = "semtech,sx1508q", .data = &sx1508q_device_data },
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{ .compatible = "semtech,sx1509q", .data = &sx1509q_device_data },
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{},
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