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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/i915: Fix port sync code to work with >2 pipes
Don't assume there is just one port sync slave. We might have several. v2: Fix unitialized new_crtc_state usage (José) Fix clearing of modeset_pipes for slaves s/oldnew/new/ Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200313164831.5980-11-ville.syrjala@linux.intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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@ -15008,18 +15008,6 @@ static void intel_update_crtc(struct intel_atomic_state *state,
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intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
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}
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static struct intel_crtc *intel_get_slave_crtc(const struct intel_crtc_state *new_crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(new_crtc_state->uapi.crtc->dev);
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enum transcoder slave_transcoder;
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drm_WARN_ON(&dev_priv->drm,
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!is_power_of_2(new_crtc_state->sync_mode_slaves_mask));
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slave_transcoder = ffs(new_crtc_state->sync_mode_slaves_mask) - 1;
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return intel_get_crtc_for_pipe(dev_priv,
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(enum pipe)slave_transcoder);
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}
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static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
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struct intel_crtc_state *old_crtc_state,
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@ -15108,8 +15096,8 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
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}
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}
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static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
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struct intel_atomic_state *state)
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static void intel_set_dp_tp_ctl_normal(struct intel_atomic_state *state,
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struct intel_crtc *crtc)
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{
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struct drm_connector *uninitialized_var(conn);
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struct drm_connector_state *conn_state;
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@ -15124,45 +15112,56 @@ static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
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intel_dp_stop_link_train(intel_dp);
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}
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static void intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
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struct intel_atomic_state *state,
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struct intel_crtc_state *old_crtc_state,
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struct intel_crtc_state *new_crtc_state)
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static void intel_update_trans_port_sync_crtcs(struct intel_atomic_state *state,
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struct intel_crtc *crtc)
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{
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struct drm_i915_private *i915 = to_i915(crtc->base.dev);
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struct intel_crtc *slave_crtc = intel_get_slave_crtc(new_crtc_state);
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struct intel_crtc_state *new_slave_crtc_state =
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intel_atomic_get_new_crtc_state(state, slave_crtc);
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struct intel_crtc_state *old_slave_crtc_state =
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intel_atomic_get_old_crtc_state(state, slave_crtc);
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struct drm_i915_private *i915 = to_i915(state->base.dev);
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const struct intel_crtc_state *new_slave_crtc_state;
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const struct intel_crtc_state *new_crtc_state =
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intel_atomic_get_new_crtc_state(state, crtc);
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struct intel_crtc *slave_crtc;
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int i;
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drm_WARN_ON(&i915->drm, !slave_crtc || !new_slave_crtc_state ||
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!old_slave_crtc_state);
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for_each_new_intel_crtc_in_state(state, slave_crtc,
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new_slave_crtc_state, i) {
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if (new_slave_crtc_state->master_transcoder !=
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new_crtc_state->cpu_transcoder)
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continue;
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drm_dbg_kms(&i915->drm,
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"Updating Transcoder Port Sync Master CRTC = %d %s and Slave CRTC %d %s\n",
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crtc->base.base.id, crtc->base.name,
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"Updating transcoder port sync slave [CRTC:%d:%s]\n",
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slave_crtc->base.base.id, slave_crtc->base.name);
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/* Enable seq for slave with with DP_TP_CTL left Idle until the
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* master is ready
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*/
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intel_enable_crtc(state, slave_crtc);
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}
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drm_dbg_kms(&i915->drm,
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"Updating transcoder port sync master [CRTC:%d:%s]\n",
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crtc->base.base.id, crtc->base.name);
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/* Enable seq for master with with DP_TP_CTL left Idle */
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intel_enable_crtc(state, crtc);
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/* Set Slave's DP_TP_CTL to Normal */
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intel_set_dp_tp_ctl_normal(slave_crtc,
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state);
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for_each_new_intel_crtc_in_state(state, slave_crtc,
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new_slave_crtc_state, i) {
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if (new_slave_crtc_state->master_transcoder !=
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new_crtc_state->cpu_transcoder)
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continue;
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intel_set_dp_tp_ctl_normal(state, slave_crtc);
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}
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/* Set Master's DP_TP_CTL To Normal */
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usleep_range(200, 400);
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intel_set_dp_tp_ctl_normal(crtc,
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state);
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intel_set_dp_tp_ctl_normal(state, crtc);
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for_each_new_intel_crtc_in_state(state, slave_crtc,
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new_slave_crtc_state, i) {
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if (new_slave_crtc_state->master_transcoder !=
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new_crtc_state->cpu_transcoder)
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continue;
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/* Now do the post crtc enable for all master and slaves */
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intel_update_crtc(state, slave_crtc);
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}
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intel_update_crtc(state, crtc);
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}
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@ -15256,8 +15255,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
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* Enable all pipes that needs a modeset and do not depends on other
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* pipes
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*/
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for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
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new_crtc_state, i) {
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for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
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enum pipe pipe = crtc->pipe;
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if ((modeset_pipes & BIT(pipe)) == 0)
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@ -15274,16 +15272,21 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
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modeset_pipes &= ~BIT(pipe);
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if (is_trans_port_sync_mode(new_crtc_state)) {
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const struct intel_crtc_state *new_slave_crtc_state;
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struct intel_crtc *slave_crtc;
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int i;
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intel_update_trans_port_sync_crtcs(crtc, state,
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old_crtc_state,
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new_crtc_state);
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intel_update_trans_port_sync_crtcs(state, crtc);
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for_each_new_intel_crtc_in_state(state, slave_crtc,
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new_slave_crtc_state, i) {
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if (new_slave_crtc_state->master_transcoder !=
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new_crtc_state->cpu_transcoder)
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continue;
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slave_crtc = intel_get_slave_crtc(new_crtc_state);
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/* TODO: update entries[] of slave */
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modeset_pipes &= ~BIT(slave_crtc->pipe);
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}
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} else {
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intel_enable_crtc(state, crtc);
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intel_update_crtc(state, crtc);
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