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drm/amd/display: blank otg before power gate front end.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2298,8 +2298,10 @@ static void dcn10_apply_ctx_for_surface(
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struct pipe_ctx *old_pipe_ctx =
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&dc->current_context->res_ctx.pipe_ctx[i];
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if (old_pipe_ctx->stream_res.tg && old_pipe_ctx->stream_res.tg->inst == be_idx)
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if (old_pipe_ctx->stream_res.tg && old_pipe_ctx->stream_res.tg->inst == be_idx) {
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old_pipe_ctx->stream_res.tg->funcs->set_blank(old_pipe_ctx->stream_res.tg, true);
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dcn10_power_down_fe(dc, old_pipe_ctx->pipe_idx);
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}
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}
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return;
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}
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