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drm/nouveau/gpio: namespace + nvidia gpu names (no binary change)

Browse Source 
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-01-14 15:02:59 +10:00
parent 630ec6c0d3
commit 4e7659fc5b
13 changed files with 205 additions and 221 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

35
drivers/gpu/drm/nouveau/include/nvkm/subdev/gpio.h
View File

@ -1,8 +1,6 @@
#ifndef __NOUVEAU_GPIO_H__
#define __NOUVEAU_GPIO_H__
#ifndef __NVKM_GPIO_H__
#define __NVKM_GPIO_H__
#include <core/subdev.h>
#include <core/device.h>
#include <core/event.h>
#include <subdev/bios.h>
@ -20,28 +18,27 @@ struct nvkm_gpio_ntfy_rep {
u8 mask;
};
struct nouveau_gpio {
struct nouveau_subdev base;
struct nvkm_gpio {
struct nvkm_subdev base;
struct nvkm_event event;
void (*reset)(struct nouveau_gpio *, u8 func);
int (*find)(struct nouveau_gpio *, int idx, u8 tag, u8 line,
void (*reset)(struct nvkm_gpio *, u8 func);
int (*find)(struct nvkm_gpio *, int idx, u8 tag, u8 line,
struct dcb_gpio_func *);
int (*set)(struct nouveau_gpio *, int idx, u8 tag, u8 line, int state);
int (*get)(struct nouveau_gpio *, int idx, u8 tag, u8 line);
int (*set)(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state);
int (*get)(struct nvkm_gpio *, int idx, u8 tag, u8 line);
};
static inline struct nouveau_gpio *
nouveau_gpio(void *obj)
static inline struct nvkm_gpio *
nvkm_gpio(void *obj)
{
return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_GPIO);
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_GPIO);
}
extern struct nouveau_oclass *nv10_gpio_oclass;
extern struct nouveau_oclass *nv50_gpio_oclass;
extern struct nouveau_oclass *nv94_gpio_oclass;
extern struct nouveau_oclass *nvd0_gpio_oclass;
extern struct nouveau_oclass *nve0_gpio_oclass;
extern struct nvkm_oclass *nv10_gpio_oclass;
extern struct nvkm_oclass *nv50_gpio_oclass;
extern struct nvkm_oclass *g94_gpio_oclass;
extern struct nvkm_oclass *gf110_gpio_oclass;
extern struct nvkm_oclass *gk104_gpio_oclass;
#endif

4
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
View File

@ -62,7 +62,7 @@ gm100_identify(struct nouveau_device *device)
case 0x117:
device->cname = "GM107";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
@ -102,7 +102,7 @@ gm100_identify(struct nouveau_device *device)
case 0x124:
device->cname = "GM204";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
#if 0

20
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
View File

@ -177,7 +177,7 @@ nv50_identify(struct nouveau_device *device)
case 0x94:
device->cname = "G94";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
@ -206,7 +206,7 @@ nv50_identify(struct nouveau_device *device)
case 0x96:
device->cname = "G96";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
@ -235,7 +235,7 @@ nv50_identify(struct nouveau_device *device)
case 0x98:
device->cname = "G98";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
@ -264,7 +264,7 @@ nv50_identify(struct nouveau_device *device)
case 0xa0:
device->cname = "G200";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv50_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = g84_clk_oclass;
@ -293,7 +293,7 @@ nv50_identify(struct nouveau_device *device)
case 0xaa:
device->cname = "MCP77/MCP78";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
@ -322,7 +322,7 @@ nv50_identify(struct nouveau_device *device)
case 0xac:
device->cname = "MCP79/MCP7A";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = mcp77_clk_oclass;
@ -351,7 +351,7 @@ nv50_identify(struct nouveau_device *device)
case 0xa3:
device->cname = "GT215";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
@ -382,7 +382,7 @@ nv50_identify(struct nouveau_device *device)
case 0xa5:
device->cname = "GT216";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
@ -412,7 +412,7 @@ nv50_identify(struct nouveau_device *device)
case 0xa8:
device->cname = "GT218";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;
@ -442,7 +442,7 @@ nv50_identify(struct nouveau_device *device)
case 0xaf:
device->cname = "MCP89";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gt215_clk_oclass;

18
drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c
View File

@ -62,7 +62,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xc0:
device->cname = "GF100";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -95,7 +95,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xc4:
device->cname = "GF104";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -128,7 +128,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xc3:
device->cname = "GF106";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -160,7 +160,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xce:
device->cname = "GF114";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -193,7 +193,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xcf:
device->cname = "GF116";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -225,7 +225,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xc1:
device->cname = "GF108";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -257,7 +257,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xc8:
device->cname = "GF110";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nv94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = g94_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv94_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -290,7 +290,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xd9:
device->cname = "GF119";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nvd0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;
@ -322,7 +322,7 @@ nvc0_identify(struct nouveau_device *device)
case 0xd7:
device->cname = "GF117";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nvd0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gf110_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = gf117_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gf100_clk_oclass;

14
drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c
View File

@ -62,7 +62,7 @@ nve0_identify(struct nouveau_device *device)
case 0xe4:
device->cname = "GK104";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
@ -96,7 +96,7 @@ nve0_identify(struct nouveau_device *device)
case 0xe7:
device->cname = "GK107";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
@ -130,7 +130,7 @@ nve0_identify(struct nouveau_device *device)
case 0xe6:
device->cname = "GK106";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
@ -186,7 +186,7 @@ nve0_identify(struct nouveau_device *device)
case 0xf0:
device->cname = "GK110";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
@ -220,7 +220,7 @@ nve0_identify(struct nouveau_device *device)
case 0xf1:
device->cname = "GK110B";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nvd0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
@ -254,7 +254,7 @@ nve0_identify(struct nouveau_device *device)
case 0x106:
device->cname = "GK208B";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
@ -287,7 +287,7 @@ nve0_identify(struct nouveau_device *device)
case 0x108:
device->cname = "GK208";
device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = nve0_gpio_oclass;
device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nve0_i2c_oclass;
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;

6
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/Kbuild
View File

@ -1,6 +1,6 @@
nvkm-y += nvkm/subdev/gpio/base.o
nvkm-y += nvkm/subdev/gpio/nv10.o
nvkm-y += nvkm/subdev/gpio/nv50.o
nvkm-y += nvkm/subdev/gpio/nv94.o
nvkm-y += nvkm/subdev/gpio/nvd0.o
nvkm-y += nvkm/subdev/gpio/nve0.o
nvkm-y += nvkm/subdev/gpio/g94.o
nvkm-y += nvkm/subdev/gpio/gf110.o
nvkm-y += nvkm/subdev/gpio/gk104.o

119
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/base.c
View File

@ -21,33 +21,30 @@
*
* Authors: Ben Skeggs
*/
#include <core/notify.h>
#include <subdev/bios.h>
#include <subdev/bios/gpio.h>
#include "priv.h"
#include <core/device.h>
#include <core/notify.h>
static int
nouveau_gpio_drive(struct nouveau_gpio *gpio,
int idx, int line, int dir, int out)
nvkm_gpio_drive(struct nvkm_gpio *gpio, int idx, int line, int dir, int out)
{
const struct nouveau_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
return impl->drive ? impl->drive(gpio, line, dir, out) : -ENODEV;
}
static int
nouveau_gpio_sense(struct nouveau_gpio *gpio, int idx, int line)
nvkm_gpio_sense(struct nvkm_gpio *gpio, int idx, int line)
{
const struct nouveau_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
return impl->sense ? impl->sense(gpio, line) : -ENODEV;
}
static int
nouveau_gpio_find(struct nouveau_gpio *gpio, int idx, u8 tag, u8 line,
struct dcb_gpio_func *func)
nvkm_gpio_find(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line,
struct dcb_gpio_func *func)
{
struct nouveau_bios *bios = nouveau_bios(gpio);
struct nvkm_bios *bios = nvkm_bios(gpio);
u8 ver, len;
u16 data;
@ -75,30 +72,30 @@ nouveau_gpio_find(struct nouveau_gpio *gpio, int idx, u8 tag, u8 line,
}
static int
nouveau_gpio_set(struct nouveau_gpio *gpio, int idx, u8 tag, u8 line, int state)
nvkm_gpio_set(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line, int state)
{
struct dcb_gpio_func func;
int ret;
ret = nouveau_gpio_find(gpio, idx, tag, line, &func);
ret = nvkm_gpio_find(gpio, idx, tag, line, &func);
if (ret == 0) {
int dir = !!(func.log[state] & 0x02);
int out = !!(func.log[state] & 0x01);
ret = nouveau_gpio_drive(gpio, idx, func.line, dir, out);
ret = nvkm_gpio_drive(gpio, idx, func.line, dir, out);
}
return ret;
}
static int
nouveau_gpio_get(struct nouveau_gpio *gpio, int idx, u8 tag, u8 line)
nvkm_gpio_get(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line)
{
struct dcb_gpio_func func;
int ret;
ret = nouveau_gpio_find(gpio, idx, tag, line, &func);
ret = nvkm_gpio_find(gpio, idx, tag, line, &func);
if (ret == 0) {
ret = nouveau_gpio_sense(gpio, idx, func.line);
ret = nvkm_gpio_sense(gpio, idx, func.line);
if (ret >= 0)
ret = (ret == (func.log[1] & 1));
}
@ -107,24 +104,24 @@ nouveau_gpio_get(struct nouveau_gpio *gpio, int idx, u8 tag, u8 line)
}
static void
nouveau_gpio_intr_fini(struct nvkm_event *event, int type, int index)
nvkm_gpio_intr_fini(struct nvkm_event *event, int type, int index)
{
struct nouveau_gpio *gpio = container_of(event, typeof(*gpio), event);
const struct nouveau_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
struct nvkm_gpio *gpio = container_of(event, typeof(*gpio), event);
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
impl->intr_mask(gpio, type, 1 << index, 0);
}
static void
nouveau_gpio_intr_init(struct nvkm_event *event, int type, int index)
nvkm_gpio_intr_init(struct nvkm_event *event, int type, int index)
{
struct nouveau_gpio *gpio = container_of(event, typeof(*gpio), event);
const struct nouveau_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
struct nvkm_gpio *gpio = container_of(event, typeof(*gpio), event);
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
impl->intr_mask(gpio, type, 1 << index, 1 << index);
}
static int
nouveau_gpio_intr_ctor(struct nouveau_object *object, void *data, u32 size,
struct nvkm_notify *notify)
nvkm_gpio_intr_ctor(struct nvkm_object *object, void *data, u32 size,
struct nvkm_notify *notify)
{
struct nvkm_gpio_ntfy_req *req = data;
if (!WARN_ON(size != sizeof(*req))) {
@ -137,10 +134,10 @@ nouveau_gpio_intr_ctor(struct nouveau_object *object, void *data, u32 size,
}
static void
nouveau_gpio_intr(struct nouveau_subdev *subdev)
nvkm_gpio_intr(struct nvkm_subdev *subdev)
{
struct nouveau_gpio *gpio = nouveau_gpio(subdev);
const struct nouveau_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
struct nvkm_gpio *gpio = nvkm_gpio(subdev);
const struct nvkm_gpio_impl *impl = (void *)nv_object(gpio)->oclass;
u32 hi, lo, i;
impl->intr_stat(gpio, &hi, &lo);
@ -155,23 +152,23 @@ nouveau_gpio_intr(struct nouveau_subdev *subdev)
}
static const struct nvkm_event_func
nouveau_gpio_intr_func = {
.ctor = nouveau_gpio_intr_ctor,
.init = nouveau_gpio_intr_init,
.fini = nouveau_gpio_intr_fini,
nvkm_gpio_intr_func = {
.ctor = nvkm_gpio_intr_ctor,
.init = nvkm_gpio_intr_init,
.fini = nvkm_gpio_intr_fini,
};
int
_nouveau_gpio_fini(struct nouveau_object *object, bool suspend)
_nvkm_gpio_fini(struct nvkm_object *object, bool suspend)
{
const struct nouveau_gpio_impl *impl = (void *)object->oclass;
struct nouveau_gpio *gpio = nouveau_gpio(object);
const struct nvkm_gpio_impl *impl = (void *)object->oclass;
struct nvkm_gpio *gpio = nvkm_gpio(object);
u32 mask = (1 << impl->lines) - 1;
impl->intr_mask(gpio, NVKM_GPIO_TOGGLED, mask, 0);
impl->intr_stat(gpio, &mask, &mask);
return nouveau_subdev_fini(&gpio->base, suspend);
return nvkm_subdev_fini(&gpio->base, suspend);
}
static struct dmi_system_id gpio_reset_ids[] = {
@ -186,12 +183,12 @@ static struct dmi_system_id gpio_reset_ids[] = {
};
int
_nouveau_gpio_init(struct nouveau_object *object)
_nvkm_gpio_init(struct nvkm_object *object)
{
struct nouveau_gpio *gpio = nouveau_gpio(object);
struct nvkm_gpio *gpio = nvkm_gpio(object);
int ret;
ret = nouveau_subdev_init(&gpio->base);
ret = nvkm_subdev_init(&gpio->base);
if (ret)
return ret;
@ -202,52 +199,50 @@ _nouveau_gpio_init(struct nouveau_object *object)
}
void
_nouveau_gpio_dtor(struct nouveau_object *object)
_nvkm_gpio_dtor(struct nvkm_object *object)
{
struct nouveau_gpio *gpio = (void *)object;
struct nvkm_gpio *gpio = (void *)object;
nvkm_event_fini(&gpio->event);
nouveau_subdev_destroy(&gpio->base);
nvkm_subdev_destroy(&gpio->base);
}
int
nouveau_gpio_create_(struct nouveau_object *parent,
struct nouveau_object *engine,
struct nouveau_oclass *oclass,
int length, void **pobject)
nvkm_gpio_create_(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, int length, void **pobject)
{
const struct nouveau_gpio_impl *impl = (void *)oclass;
struct nouveau_gpio *gpio;
const struct nvkm_gpio_impl *impl = (void *)oclass;
struct nvkm_gpio *gpio;
int ret;
ret = nouveau_subdev_create_(parent, engine, oclass, 0, "GPIO", "gpio",
length, pobject);
ret = nvkm_subdev_create_(parent, engine, oclass, 0, "GPIO",
"gpio", length, pobject);
gpio = *pobject;
if (ret)
return ret;
gpio->find = nouveau_gpio_find;
gpio->set = nouveau_gpio_set;
gpio->get = nouveau_gpio_get;
gpio->find = nvkm_gpio_find;
gpio->set = nvkm_gpio_set;
gpio->get = nvkm_gpio_get;
gpio->reset = impl->reset;
ret = nvkm_event_init(&nouveau_gpio_intr_func, 2, impl->lines,
ret = nvkm_event_init(&nvkm_gpio_intr_func, 2, impl->lines,
&gpio->event);
if (ret)
return ret;
nv_subdev(gpio)->intr = nouveau_gpio_intr;
nv_subdev(gpio)->intr = nvkm_gpio_intr;
return 0;
}
int
_nouveau_gpio_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_oclass *oclass, void *data, u32 size,
struct nouveau_object **pobject)
_nvkm_gpio_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nouveau_gpio *gpio;
struct nvkm_gpio *gpio;
int ret;
ret = nouveau_gpio_create(parent, engine, oclass, &gpio);
ret = nvkm_gpio_create(parent, engine, oclass, &gpio);
*pobject = nv_object(gpio);
if (ret)
return ret;

23
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv94.c → drivers/gpu/drm/nouveau/nvkm/subdev/gpio/g94.c
View File

@ -21,11 +21,10 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"
void
nv94_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
g94_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
{
u32 intr0 = nv_rd32(gpio, 0x00e054);
u32 intr1 = nv_rd32(gpio, 0x00e074);
@ -38,7 +37,7 @@ nv94_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
}
void
nv94_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
g94_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
{
u32 inte0 = nv_rd32(gpio, 0x00e050);
u32 inte1 = nv_rd32(gpio, 0x00e070);
@ -56,18 +55,18 @@ nv94_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv_wr32(gpio, 0x00e070, inte1);
}
struct nouveau_oclass *
nv94_gpio_oclass = &(struct nouveau_gpio_impl) {
struct nvkm_oclass *
g94_gpio_oclass = &(struct nvkm_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0x94),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = _nvkm_gpio_ctor,
.dtor = _nvkm_gpio_dtor,
.init = _nvkm_gpio_init,
.fini = _nvkm_gpio_fini,
},
.lines = 32,
.intr_stat = nv94_gpio_intr_stat,
.intr_mask = nv94_gpio_intr_mask,
.intr_stat = g94_gpio_intr_stat,
.intr_mask = g94_gpio_intr_mask,
.drive = nv50_gpio_drive,
.sense = nv50_gpio_sense,
.reset = nv50_gpio_reset,

33
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nvd0.c → drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gf110.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"
void
nvd0_gpio_reset(struct nouveau_gpio *gpio, u8 match)
gf110_gpio_reset(struct nvkm_gpio *gpio, u8 match)
{
struct nouveau_bios *bios = nouveau_bios(gpio);
struct nvkm_bios *bios = nvkm_bios(gpio);
u8 ver, len;
u16 entry;
int ent = -1;
@ -53,7 +52,7 @@ nvd0_gpio_reset(struct nouveau_gpio *gpio, u8 match)
}
int
nvd0_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
gf110_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
{
u32 data = ((dir ^ 1) << 13) | (out << 12);
nv_mask(gpio, 0x00d610 + (line * 4), 0x00003000, data);
@ -62,24 +61,24 @@ nvd0_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
}
int
nvd0_gpio_sense(struct nouveau_gpio *gpio, int line)
gf110_gpio_sense(struct nvkm_gpio *gpio, int line)
{
return !!(nv_rd32(gpio, 0x00d610 + (line * 4)) & 0x00004000);
}
struct nouveau_oclass *
nvd0_gpio_oclass = &(struct nouveau_gpio_impl) {
struct nvkm_oclass *
gf110_gpio_oclass = &(struct nvkm_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0xd0),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = _nvkm_gpio_ctor,
.dtor = _nvkm_gpio_dtor,
.init = _nvkm_gpio_init,
.fini = _nvkm_gpio_fini,
},
.lines = 32,
.intr_stat = nv94_gpio_intr_stat,
.intr_mask = nv94_gpio_intr_mask,
.drive = nvd0_gpio_drive,
.sense = nvd0_gpio_sense,
.reset = nvd0_gpio_reset,
.intr_stat = g94_gpio_intr_stat,
.intr_mask = g94_gpio_intr_mask,
.drive = gf110_gpio_drive,
.sense = gf110_gpio_sense,
.reset = gf110_gpio_reset,
}.base;

29
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nve0.c → drivers/gpu/drm/nouveau/nvkm/subdev/gpio/gk104.c
View File

@ -21,11 +21,10 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"
static void
nve0_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
gk104_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
{
u32 intr0 = nv_rd32(gpio, 0x00dc00);
u32 intr1 = nv_rd32(gpio, 0x00dc80);
@ -38,7 +37,7 @@ nve0_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
}
void
nve0_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
gk104_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
{
u32 inte0 = nv_rd32(gpio, 0x00dc08);
u32 inte1 = nv_rd32(gpio, 0x00dc88);
@ -56,19 +55,19 @@ nve0_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv_wr32(gpio, 0x00dc88, inte1);
}
struct nouveau_oclass *
nve0_gpio_oclass = &(struct nouveau_gpio_impl) {
struct nvkm_oclass *
gk104_gpio_oclass = &(struct nvkm_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0xe0),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = _nvkm_gpio_ctor,
.dtor = _nvkm_gpio_dtor,
.init = _nvkm_gpio_init,
.fini = _nvkm_gpio_fini,
},
.lines = 32,
.intr_stat = nve0_gpio_intr_stat,
.intr_mask = nve0_gpio_intr_mask,
.drive = nvd0_gpio_drive,
.sense = nvd0_gpio_sense,
.reset = nvd0_gpio_reset,
.intr_stat = gk104_gpio_intr_stat,
.intr_mask = gk104_gpio_intr_mask,
.drive = gf110_gpio_drive,
.sense = gf110_gpio_sense,
.reset = gf110_gpio_reset,
}.base;

23
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv10.c
View File

@ -23,11 +23,10 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#include "priv.h"
static int
nv10_gpio_sense(struct nouveau_gpio *gpio, int line)
nv10_gpio_sense(struct nvkm_gpio *gpio, int line)
{
if (line < 2) {
line = line * 16;
@ -49,7 +48,7 @@ nv10_gpio_sense(struct nouveau_gpio *gpio, int line)
}
static int
nv10_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
nv10_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
{
u32 reg, mask, data;
@ -79,7 +78,7 @@ nv10_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
}
static void
nv10_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
nv10_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
{
u32 intr = nv_rd32(gpio, 0x001104);
u32 stat = nv_rd32(gpio, 0x001144) & intr;
@ -89,7 +88,7 @@ nv10_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
}
static void
nv10_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv10_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
{
u32 inte = nv_rd32(gpio, 0x001144);
if (type & NVKM_GPIO_LO)
@ -99,14 +98,14 @@ nv10_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv_wr32(gpio, 0x001144, inte);
}
struct nouveau_oclass *
nv10_gpio_oclass = &(struct nouveau_gpio_impl) {
struct nvkm_oclass *
nv10_gpio_oclass = &(struct nvkm_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0x10),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = _nvkm_gpio_ctor,
.dtor = _nvkm_gpio_dtor,
.init = _nvkm_gpio_init,
.fini = _nvkm_gpio_fini,
},
.lines = 16,
.intr_stat = nv10_gpio_intr_stat,

27
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/nv50.c
View File

@ -21,13 +21,12 @@
*
* Authors: Ben Skeggs
*/
#include "priv.h"
void
nv50_gpio_reset(struct nouveau_gpio *gpio, u8 match)
nv50_gpio_reset(struct nvkm_gpio *gpio, u8 match)
{
struct nouveau_bios *bios = nouveau_bios(gpio);
struct nvkm_bios *bios = nvkm_bios(gpio);
u8 ver, len;
u16 entry;
int ent = -1;
@ -68,7 +67,7 @@ nv50_gpio_location(int line, u32 *reg, u32 *shift)
}
int
nv50_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
nv50_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out)
{
u32 reg, shift;
@ -80,7 +79,7 @@ nv50_gpio_drive(struct nouveau_gpio *gpio, int line, int dir, int out)
}
int
nv50_gpio_sense(struct nouveau_gpio *gpio, int line)
nv50_gpio_sense(struct nvkm_gpio *gpio, int line)
{
u32 reg, shift;
@ -91,7 +90,7 @@ nv50_gpio_sense(struct nouveau_gpio *gpio, int line)
}
static void
nv50_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
nv50_gpio_intr_stat(struct nvkm_gpio *gpio, u32 *hi, u32 *lo)
{
u32 intr = nv_rd32(gpio, 0x00e054);
u32 stat = nv_rd32(gpio, 0x00e050) & intr;
@ -101,7 +100,7 @@ nv50_gpio_intr_stat(struct nouveau_gpio *gpio, u32 *hi, u32 *lo)
}
static void
nv50_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv50_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data)
{
u32 inte = nv_rd32(gpio, 0x00e050);
if (type & NVKM_GPIO_LO)
@ -111,14 +110,14 @@ nv50_gpio_intr_mask(struct nouveau_gpio *gpio, u32 type, u32 mask, u32 data)
nv_wr32(gpio, 0x00e050, inte);
}
struct nouveau_oclass *
nv50_gpio_oclass = &(struct nouveau_gpio_impl) {
struct nvkm_oclass *
nv50_gpio_oclass = &(struct nvkm_gpio_impl) {
.base.handle = NV_SUBDEV(GPIO, 0x50),
.base.ofuncs = &(struct nouveau_ofuncs) {
.ctor = _nouveau_gpio_ctor,
.dtor = _nouveau_gpio_dtor,
.init = _nouveau_gpio_init,
.fini = _nouveau_gpio_fini,
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = _nvkm_gpio_ctor,
.dtor = _nvkm_gpio_dtor,
.init = _nvkm_gpio_init,
.fini = _nvkm_gpio_fini,
},
.lines = 16,
.intr_stat = nv50_gpio_intr_stat,

75
drivers/gpu/drm/nouveau/nvkm/subdev/gpio/priv.h
View File

@ -1,67 +1,64 @@
#ifndef __NVKM_GPIO_H__
#define __NVKM_GPIO_H__
#ifndef __NVKM_GPIO_PRIV_H__
#define __NVKM_GPIO_PRIV_H__
#include <subdev/gpio.h>
#define nouveau_gpio_create(p,e,o,d) \
nouveau_gpio_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nouveau_gpio_destroy(p) ({ \
struct nouveau_gpio *gpio = (p); \
_nouveau_gpio_dtor(nv_object(gpio)); \
#define nvkm_gpio_create(p,e,o,d) \
nvkm_gpio_create_((p), (e), (o), sizeof(**d), (void **)d)
#define nvkm_gpio_destroy(p) ({ \
struct nvkm_gpio *gpio = (p); \
_nvkm_gpio_dtor(nv_object(gpio)); \
})
#define nouveau_gpio_init(p) ({ \
struct nouveau_gpio *gpio = (p); \
_nouveau_gpio_init(nv_object(gpio)); \
#define nvkm_gpio_init(p) ({ \
struct nvkm_gpio *gpio = (p); \
_nvkm_gpio_init(nv_object(gpio)); \
})
#define nouveau_gpio_fini(p,s) ({ \
struct nouveau_gpio *gpio = (p); \
_nouveau_gpio_fini(nv_object(gpio), (s)); \
#define nvkm_gpio_fini(p,s) ({ \
struct nvkm_gpio *gpio = (p); \
_nvkm_gpio_fini(nv_object(gpio), (s)); \
})
int nouveau_gpio_create_(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, int, void **);
int _nouveau_gpio_ctor(struct nouveau_object *, struct nouveau_object *,
struct nouveau_oclass *, void *, u32,
struct nouveau_object **);
void _nouveau_gpio_dtor(struct nouveau_object *);
int _nouveau_gpio_init(struct nouveau_object *);
int _nouveau_gpio_fini(struct nouveau_object *, bool);
int nvkm_gpio_create_(struct nvkm_object *, struct nvkm_object *,
struct nvkm_oclass *, int, void **);
int _nvkm_gpio_ctor(struct nvkm_object *, struct nvkm_object *,
struct nvkm_oclass *, void *, u32,
struct nvkm_object **);
void _nvkm_gpio_dtor(struct nvkm_object *);
int _nvkm_gpio_init(struct nvkm_object *);
int _nvkm_gpio_fini(struct nvkm_object *, bool);
struct nouveau_gpio_impl {
struct nouveau_oclass base;
struct nvkm_gpio_impl {
struct nvkm_oclass base;
int lines;
/* read and ack pending interrupts, returning only data
* for lines that have not been masked off, while still
* performing the ack for anything that was pending.
*/
void (*intr_stat)(struct nouveau_gpio *, u32 *, u32 *);
void (*intr_stat)(struct nvkm_gpio *, u32 *, u32 *);
/* mask on/off interrupts for hi/lo transitions on a
* given set of gpio lines
*/
void (*intr_mask)(struct nouveau_gpio *, u32, u32, u32);
void (*intr_mask)(struct nvkm_gpio *, u32, u32, u32);
/* configure gpio direction and output value */
int (*drive)(struct nouveau_gpio *, int line, int dir, int out);
int (*drive)(struct nvkm_gpio *, int line, int dir, int out);
/* sense current state of given gpio line */
int (*sense)(struct nouveau_gpio *, int line);
int (*sense)(struct nvkm_gpio *, int line);
/*XXX*/
void (*reset)(struct nouveau_gpio *, u8);
void (*reset)(struct nvkm_gpio *, u8);
};
void nv50_gpio_reset(struct nouveau_gpio *, u8);
int nv50_gpio_drive(struct nouveau_gpio *, int, int, int);
int nv50_gpio_sense(struct nouveau_gpio *, int);
void nv94_gpio_intr_stat(struct nouveau_gpio *, u32 *, u32 *);
void nv94_gpio_intr_mask(struct nouveau_gpio *, u32, u32, u32);
void nvd0_gpio_reset(struct nouveau_gpio *, u8);
int nvd0_gpio_drive(struct nouveau_gpio *, int, int, int);
int nvd0_gpio_sense(struct nouveau_gpio *, int);
void nv50_gpio_reset(struct nvkm_gpio *, u8);
int nv50_gpio_drive(struct nvkm_gpio *, int, int, int);
int nv50_gpio_sense(struct nvkm_gpio *, int);
void g94_gpio_intr_stat(struct nvkm_gpio *, u32 *, u32 *);
void g94_gpio_intr_mask(struct nvkm_gpio *, u32, u32, u32);
void gf110_gpio_reset(struct nvkm_gpio *, u8);
int gf110_gpio_drive(struct nvkm_gpio *, int, int, int);
int gf110_gpio_sense(struct nvkm_gpio *, int);
#endif