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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 14:40:55 +07:00
drm/radeon: fixup further bus mastering confusion.
rs400/480 are like previous chips not like rs6xx chips. Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -653,15 +653,16 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
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RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
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/* Turn on bus mastering */
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if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
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/* rs400, rs690/rs740 */
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tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS400_BUS_MASTER_DIS;
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/* rs600/rs690/rs740 */
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tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
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RADEON_WRITE(RADEON_BUS_CNTL, tmp);
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} else if (!(((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R423))) {
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/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
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} else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
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((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
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/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
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tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
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RADEON_WRITE(RADEON_BUS_CNTL, tmp);
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} /* PCIE cards appears to not need this */
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@ -447,12 +447,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
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* handling, not bus mastering itself.
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*/
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#define RADEON_BUS_CNTL 0x0030
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/* r1xx, r2xx, r300, r(v)350, r420/r481, rs480 */
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/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
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# define RADEON_BUS_MASTER_DIS (1 << 6)
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/* rs400, rs690/rs740 */
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# define RS400_BUS_MASTER_DIS (1 << 14)
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# define RS400_MSI_REARM (1 << 20)
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/* see RS480_MSI_REARM in AIC_CNTL for rs480 */
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/* rs600/rs690/rs740 */
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# define RS600_BUS_MASTER_DIS (1 << 14)
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# define RS600_MSI_REARM (1 << 20)
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/* see RS400_MSI_REARM in AIC_CNTL for rs480 */
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#define RADEON_BUS_CNTL1 0x0034
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# define RADEON_PMI_BM_DIS (1 << 2)
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@ -937,7 +937,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
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#define RADEON_AIC_CNTL 0x01d0
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# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
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# define RS480_MSI_REARM (1 << 3)
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# define RS400_MSI_REARM (1 << 3)
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#define RADEON_AIC_STAT 0x01d4
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#define RADEON_AIC_PT_BASE 0x01d8
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#define RADEON_AIC_LO_ADDR 0x01dc
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