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Merge branch 'improve-clause-45-support-in-phylink'
Russell King says:
====================
improve clause 45 support in phylink
These three patches improve the clause 45 support in phylink, fixing
some corner cases that have been noticed with the addition of SFP+
NBASE-T modules, but are actually a little more wisespread than I
initially realised.
The first issue was spotted with a NBASE-T PHY on a SFP+ module plugged
into a mvneta platform. When these PHYs are not operating in USXGMII
mode, but are in a single-lane Serdes mode, they will switch between
one of several different PHY interface modes.
If we call the MAC validate() function with the current PHY interface
mode, we will restrict the supported and advertising masks to the link
modes that the current PHY interface mode supports. For example, if we
determine that we want to start the PHY with an interface mode of
2500BASE-X, then this setup will restrict the advertisement and
supported masks to 2.5G speed link modes.
What we actually want for these PHYs is to allow them to support any
link modes that the PHY supports _and_ the MAC is also capable of
supporting. Without knowing the details of the PHY interface modes that
may be used, we can do this by using PHY_INTERFACE_MODE_NA to validate
and restrict the link modes to any that the MAC supports.
mvpp2 with the 88X3310 PHY avoids this problem, because the validate()
implementation allows all MAC supported speeds not only for
PHY_INTERFACE_MODE_NA, but also for XAUI and 10GKR modes.
The first patch addresses this; current MAC drivers should continue to
work as-is, but there will be a follow-on patch to fixup at least
mvpp2.
The second issue addresses a very similar problem that occurs when
trying to use ethtool to alter the advertisement mask - we call
the MAC validate() function with the current interface mode, the
current support and requested advertisement masks. This immediately
restricts the advertisement in the same way as the above.
This patch series addresses both issues, although the patches are not
in the above order.
v2: fix patch 3 missing 1G link modes for SGMII and RGMII interface
modes.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
4e133f76c1
@ -4792,6 +4792,8 @@ static void mvpp2_phylink_validate(struct phylink_config *config,
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phylink_set(mask, 10000baseER_Full);
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phylink_set(mask, 10000baseKR_Full);
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}
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if (state->interface != PHY_INTERFACE_MODE_NA)
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break;
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/* Fall-through */
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_ID:
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@ -4802,13 +4804,23 @@ static void mvpp2_phylink_validate(struct phylink_config *config,
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phylink_set(mask, 10baseT_Full);
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phylink_set(mask, 100baseT_Half);
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phylink_set(mask, 100baseT_Full);
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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if (state->interface != PHY_INTERFACE_MODE_NA)
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break;
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/* Fall-through */
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_2500BASEX:
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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phylink_set(mask, 2500baseT_Full);
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phylink_set(mask, 2500baseX_Full);
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if (port->comphy ||
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state->interface != PHY_INTERFACE_MODE_2500BASEX) {
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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}
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if (port->comphy ||
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state->interface == PHY_INTERFACE_MODE_2500BASEX) {
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phylink_set(mask, 2500baseT_Full);
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phylink_set(mask, 2500baseX_Full);
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}
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break;
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default:
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goto empty_set;
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@ -4817,6 +4829,8 @@ static void mvpp2_phylink_validate(struct phylink_config *config,
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bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
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bitmap_and(state->advertising, state->advertising, mask,
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__ETHTOOL_LINK_MODE_MASK_NBITS);
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phylink_helper_basex_speed(state);
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return;
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empty_set:
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@ -736,7 +736,19 @@ static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
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memset(&config, 0, sizeof(config));
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linkmode_copy(supported, phy->supported);
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linkmode_copy(config.advertising, phy->advertising);
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config.interface = interface;
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/* Clause 45 PHYs switch their Serdes lane between several different
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* modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
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* speeds. We really need to know which interface modes the PHY and
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* MAC supports to properly work out which linkmodes can be supported.
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*/
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if (phy->is_c45 &&
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interface != PHY_INTERFACE_MODE_RXAUI &&
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interface != PHY_INTERFACE_MODE_XAUI &&
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interface != PHY_INTERFACE_MODE_USXGMII)
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config.interface = PHY_INTERFACE_MODE_NA;
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else
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config.interface = interface;
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ret = phylink_validate(pl, supported, &config);
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if (ret)
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@ -1230,44 +1242,66 @@ int phylink_ethtool_ksettings_set(struct phylink *pl,
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__set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising);
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}
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if (phylink_validate(pl, support, &config))
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return -EINVAL;
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/* If autonegotiation is enabled, we must have an advertisement */
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if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
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return -EINVAL;
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our_kset = *kset;
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linkmode_copy(our_kset.link_modes.advertising, config.advertising);
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our_kset.base.speed = config.speed;
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our_kset.base.duplex = config.duplex;
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/* If we have a PHY, configure the phy */
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if (pl->phydev) {
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/* If we have a PHY, we process the kset change via phylib.
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* phylib will call our link state function if the PHY
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* parameters have changed, which will trigger a resolve
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* and update the MAC configuration.
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*/
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our_kset = *kset;
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linkmode_copy(our_kset.link_modes.advertising,
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config.advertising);
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our_kset.base.speed = config.speed;
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our_kset.base.duplex = config.duplex;
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ret = phy_ethtool_ksettings_set(pl->phydev, &our_kset);
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if (ret)
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return ret;
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}
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mutex_lock(&pl->state_mutex);
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/* Configure the MAC to match the new settings */
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linkmode_copy(pl->link_config.advertising, our_kset.link_modes.advertising);
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pl->link_config.interface = config.interface;
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pl->link_config.speed = our_kset.base.speed;
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pl->link_config.duplex = our_kset.base.duplex;
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pl->link_config.an_enabled = our_kset.base.autoneg != AUTONEG_DISABLE;
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mutex_lock(&pl->state_mutex);
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/* Save the new configuration */
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linkmode_copy(pl->link_config.advertising,
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our_kset.link_modes.advertising);
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pl->link_config.interface = config.interface;
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pl->link_config.speed = our_kset.base.speed;
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pl->link_config.duplex = our_kset.base.duplex;
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pl->link_config.an_enabled = our_kset.base.autoneg !=
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AUTONEG_DISABLE;
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mutex_unlock(&pl->state_mutex);
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} else {
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/* For a fixed link, this isn't able to change any parameters,
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* which just leaves inband mode.
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*/
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if (phylink_validate(pl, support, &config))
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return -EINVAL;
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/* If we have a PHY, phylib will call our link state function if the
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* mode has changed, which will trigger a resolve and update the MAC
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* configuration. For a fixed link, this isn't able to change any
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* parameters, which just leaves inband mode.
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*/
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if (pl->cur_link_an_mode == MLO_AN_INBAND &&
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!test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) {
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phylink_mac_config(pl, &pl->link_config);
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phylink_mac_an_restart(pl);
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/* If autonegotiation is enabled, we must have an advertisement */
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if (config.an_enabled &&
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phylink_is_empty_linkmode(config.advertising))
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return -EINVAL;
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mutex_lock(&pl->state_mutex);
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linkmode_copy(pl->link_config.advertising, config.advertising);
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pl->link_config.interface = config.interface;
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pl->link_config.speed = config.speed;
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pl->link_config.duplex = config.duplex;
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pl->link_config.an_enabled = kset->base.autoneg !=
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AUTONEG_DISABLE;
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if (pl->cur_link_an_mode == MLO_AN_INBAND &&
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!test_bit(PHYLINK_DISABLE_STOPPED,
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&pl->phylink_disable_state)) {
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/* If in 802.3z mode, this updates the advertisement.
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*
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* If we are in SGMII mode without a PHY, there is no
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* advertisement; the only thing we have is the pause
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* modes which can only come from a PHY.
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*/
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phylink_mac_config(pl, &pl->link_config);
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phylink_mac_an_restart(pl);
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}
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mutex_unlock(&pl->state_mutex);
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}
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mutex_unlock(&pl->state_mutex);
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return 0;
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}
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@ -1880,14 +1914,6 @@ static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
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if (ret < 0)
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return ret;
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/* Clause 45 PHYs switch their Serdes lane between several different
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* modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
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* speeds. We really need to know which interface modes the PHY and
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* MAC supports to properly work out which linkmodes can be supported.
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*/
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if (phy->is_c45)
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interface = PHY_INTERFACE_MODE_NA;
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ret = phylink_bringup_phy(pl, phy, interface);
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if (ret)
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phy_detach(phy);
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