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x86/devicetree: Use CPU description from Device Tree

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Current x86 Device Tree implementation does not support multiprocessing.
Use new DT bindings to describe the processors.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Link: https://lkml.kernel.org/r/c291fb2cef51b730b59916d7745be0eaa4378c6c.1521753738.git.ivan.gorinov@intel.com
This commit is contained in:
Ivan Gorinov 2018-03-22 14:35:47 -07:00 committed by Thomas Gleixner
parent 7f2e858408
commit 4e07db9c8d
1 changed files with 33 additions and 12 deletions
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45
arch/x86/kernel/devicetree.c
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@ -131,34 +131,52 @@ static void __init dtb_setup_hpet(void)
#endif #endif
} }
#ifdef CONFIG_X86_LOCAL_APIC
static void __init dtb_cpu_setup(void)
{
struct device_node *dn;
u32 apic_id, version;
int ret;
version = GET_APIC_VERSION(apic_read(APIC_LVR));
for_each_node_by_type(dn, "cpu") {
ret = of_property_read_u32(dn, "reg", &apic_id);
if (ret < 0) {
pr_warn("%pOF: missing local APIC ID\n", dn);
continue;
}
generic_processor_info(apic_id, version);
}
}
static void __init dtb_lapic_setup(void) static void __init dtb_lapic_setup(void)
{ {
#ifdef CONFIG_X86_LOCAL_APIC
struct device_node *dn; struct device_node *dn;
struct resource r; struct resource r;
unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE;
int ret; int ret;
dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
if (!dn) if (dn) {
return; ret = of_address_to_resource(dn, 0, &r);
if (WARN_ON(ret))
ret = of_address_to_resource(dn, 0, &r); return;
if (WARN_ON(ret)) lapic_addr = r.start;
return; }
/* Did the boot loader setup the local APIC ? */ /* Did the boot loader setup the local APIC ? */
if (!boot_cpu_has(X86_FEATURE_APIC)) { if (!boot_cpu_has(X86_FEATURE_APIC)) {
if (apic_force_enable(r.start)) if (apic_force_enable(lapic_addr))
return; return;
} }
smp_found_config = 1; smp_found_config = 1;
pic_mode = 1; pic_mode = 1;
register_lapic_address(r.start); register_lapic_address(lapic_addr);
generic_processor_info(boot_cpu_physical_apicid,
GET_APIC_VERSION(apic_read(APIC_LVR)));
#endif
} }
#endif /* CONFIG_X86_LOCAL_APIC */
#ifdef CONFIG_X86_IO_APIC #ifdef CONFIG_X86_IO_APIC
static unsigned int ioapic_id; static unsigned int ioapic_id;
@ -259,7 +277,10 @@ static void __init dtb_ioapic_setup(void) {}
static void __init dtb_apic_setup(void) static void __init dtb_apic_setup(void)
{ {
#ifdef CONFIG_X86_LOCAL_APIC
dtb_lapic_setup(); dtb_lapic_setup();
dtb_cpu_setup();
#endif
dtb_ioapic_setup(); dtb_ioapic_setup();
} }