AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-17 13:46:45 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

drm/i915/guc: Add preemption action to GuC firmware interface

Browse Source 
We're using GuC action to request preemption. However, after requesting
preemption we need to wait for GuC to finish its own post-processing
before we start submitting our requests. Firmware is using shared
context to report its status.
Let's update GuC firmware interface with those new definitions.

v2: Drop unused INTEL_GUC_PREEMPT_OPTION_IMMEDIATE

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Jeff McGee <jeff.mcgee@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171025200020.16636-5-michal.winiarski@intel.com
This commit is contained in:
Michał Winiarski 2017-10-25 22:00:12 +02:00 committed by Chris Wilson
parent b8e5eb960b
commit 4ddbe87a16
1 changed files with 39 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
drivers/gpu/drm/i915/intel_guc_fwif.h
View File

@ -544,9 +544,36 @@ union guc_log_control {
u32 value;
} __packed;
struct guc_ctx_report {
u32 report_return_status;
u32 reserved1[64];
u32 affected_count;
u32 reserved2[2];
} __packed;
/* GuC Shared Context Data Struct */
struct guc_shared_ctx_data {
u32 addr_of_last_preempted_data_low;
u32 addr_of_last_preempted_data_high;
u32 addr_of_last_preempted_data_high_tmp;
u32 padding;
u32 is_mapped_to_proxy;
u32 proxy_ctx_id;
u32 engine_reset_ctx_id;
u32 media_reset_count;
u32 reserved1[8];
u32 uk_last_ctx_switch_reason;
u32 was_reset;
u32 lrca_gpu_addr;
u64 execlist_ctx;
u32 reserved2[66];
struct guc_ctx_report preempt_ctx_report[GUC_MAX_ENGINES_NUM];
} __packed;
/* This Action will be programmed in C180 - SOFT_SCRATCH_O_REG */
enum intel_guc_action {
INTEL_GUC_ACTION_DEFAULT = 0x0,
INTEL_GUC_ACTION_REQUEST_PREEMPTION = 0x2,
INTEL_GUC_ACTION_SAMPLE_FORCEWAKE = 0x6,
INTEL_GUC_ACTION_ALLOCATE_DOORBELL = 0x10,
INTEL_GUC_ACTION_DEALLOCATE_DOORBELL = 0x20,
@ -562,6 +589,18 @@ enum intel_guc_action {
INTEL_GUC_ACTION_LIMIT
};
enum intel_guc_preempt_options {
INTEL_GUC_PREEMPT_OPTION_DROP_WORK_Q = 0x4,
INTEL_GUC_PREEMPT_OPTION_DROP_SUBMIT_Q = 0x8,
};
enum intel_guc_report_status {
INTEL_GUC_REPORT_STATUS_UNKNOWN = 0x0,
INTEL_GUC_REPORT_STATUS_ACKED = 0x1,
INTEL_GUC_REPORT_STATUS_ERROR = 0x2,
INTEL_GUC_REPORT_STATUS_COMPLETE = 0x4,
};
/*
* The GuC sends its response to a command by overwriting the
* command in SS0. The response is distinguishable from a command