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x86/cpufeature: Enable RING3MWAIT for Knights Mill

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Enable ring 3 MONITOR/MWAIT for Intel Xeon Phi codenamed Knights Mill. We
can't guarantee that this (KNM) will be the last CPU model that needs this
hack.  But, we do recognize that this is far from optimal, and there is an
effort to ensure we don't keep doing extending this hack forever.

Signed-off-by: Piotr Luc <piotr.luc@intel.com>
Cc: Piotr.Luc@intel.com
Cc: dave.hansen@linux.intel.com
Link: http://lkml.kernel.org/r/1484918557-15481-6-git-send-email-grzegorz.andrejczuk@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Piotr Luc 2017-01-20 14:22:37 +01:00 committed by Thomas Gleixner
parent e16fd002af
commit 4d8bb00604
1 changed files with 8 additions and 1 deletions
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9
arch/x86/kernel/cpu/intel.c
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@ -79,8 +79,15 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
* Ring 3 MONITOR/MWAIT feature cannot be detected without * Ring 3 MONITOR/MWAIT feature cannot be detected without
* cpu model and family comparison. * cpu model and family comparison.
*/ */
if (c->x86 != 6 || c->x86_model != INTEL_FAM6_XEON_PHI_KNL) if (c->x86 != 6)
return; return;
switch (c->x86_model) {
case INTEL_FAM6_XEON_PHI_KNL:
case INTEL_FAM6_XEON_PHI_KNM:
break;
default:
return;
}
if (ring3mwait_disabled) { if (ring3mwait_disabled) {
msr_clear_bit(MSR_MISC_FEATURE_ENABLES, msr_clear_bit(MSR_MISC_FEATURE_ENABLES,