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drm/amd/pp: Fix truncated clock value when set watermark

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the clk value should be tranferred to MHz first and
then transfer to uint16. otherwise, the clock value
will be truncated.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reported-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
This commit is contained in:
Rex Zhu 2018-11-13 11:15:56 +08:00 committed by Alex Deucher
parent c837243ff4
commit 4d454e9ffd
1 changed files with 16 additions and 16 deletions
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32
drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c
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@ -713,20 +713,20 @@ int smu_set_watermarks_for_clocks_ranges(void *wt_table,
for (i = 0; i < wm_with_clock_ranges->num_wm_dmif_sets; i++) { for (i = 0; i < wm_with_clock_ranges->num_wm_dmif_sets; i++) {
table->WatermarkRow[1][i].MinClock = table->WatermarkRow[1][i].MinClock =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_dcfclk_clk_in_khz) / (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_dcfclk_clk_in_khz /
1000); 1000));
table->WatermarkRow[1][i].MaxClock = table->WatermarkRow[1][i].MaxClock =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_dcfclk_clk_in_khz) / (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_dcfclk_clk_in_khz /
1000); 1000));
table->WatermarkRow[1][i].MinUclk = table->WatermarkRow[1][i].MinUclk =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_mem_clk_in_khz) / (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_mem_clk_in_khz /
1000); 1000));
table->WatermarkRow[1][i].MaxUclk = table->WatermarkRow[1][i].MaxUclk =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_mem_clk_in_khz) / (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_mem_clk_in_khz /
1000); 1000));
table->WatermarkRow[1][i].WmSetting = (uint8_t) table->WatermarkRow[1][i].WmSetting = (uint8_t)
wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_set_id; wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_set_id;
} }
@ -734,20 +734,20 @@ int smu_set_watermarks_for_clocks_ranges(void *wt_table,
for (i = 0; i < wm_with_clock_ranges->num_wm_mcif_sets; i++) { for (i = 0; i < wm_with_clock_ranges->num_wm_mcif_sets; i++) {
table->WatermarkRow[0][i].MinClock = table->WatermarkRow[0][i].MinClock =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_min_socclk_clk_in_khz) / (wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_min_socclk_clk_in_khz /
1000); 1000));
table->WatermarkRow[0][i].MaxClock = table->WatermarkRow[0][i].MaxClock =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_max_socclk_clk_in_khz) / (wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_max_socclk_clk_in_khz /
1000); 1000));
table->WatermarkRow[0][i].MinUclk = table->WatermarkRow[0][i].MinUclk =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_min_mem_clk_in_khz) / (wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_min_mem_clk_in_khz /
1000); 1000));
table->WatermarkRow[0][i].MaxUclk = table->WatermarkRow[0][i].MaxUclk =
cpu_to_le16((uint16_t) cpu_to_le16((uint16_t)
(wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_max_mem_clk_in_khz) / (wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_max_mem_clk_in_khz /
1000); 1000));
table->WatermarkRow[0][i].WmSetting = (uint8_t) table->WatermarkRow[0][i].WmSetting = (uint8_t)
wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_set_id; wm_with_clock_ranges->wm_mcif_clocks_ranges[i].wm_set_id;
} }