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ARM: dts: OMAP: Move interrupt-parent to the root node to avoid duplication

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The interrupt-parent attribute does not have to be added in each
node since the fmwk will check for the parent as well to get it.

Create an interrupt-parent for OMAP2, OMAP3, AM33xx and remove the
attributes from every nodes that were using it.

Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: Sebastien Guiriec <s-guiriec@ti.com>
This commit is contained in:
Benoit Cousson 2012-10-24 10:47:52 +02:00
parent 3ce0a99cd4
commit 4c94ac29b5
7 changed files with 3 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
arch/arm/boot/dts/am33xx.dtsi
View File

@ -12,6 +12,7 @@
/ {
compatible = "ti,am33xx";
interrupt-parent = <&intc>;
aliases {
serial0 = &uart1;
@ -94,7 +95,6 @@ gpio1: gpio@44e07000 {
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x44e07000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <96>;
};
@ -106,7 +106,6 @@ gpio2: gpio@4804c000 {
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x4804c000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <98>;
};
@ -118,7 +117,6 @@ gpio3: gpio@481ac000 {
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x481ac000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <32>;
};
@ -130,7 +128,6 @@ gpio4: gpio@481ae000 {
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x481ae000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <62>;
};
@ -139,7 +136,6 @@ uart1: serial@44e09000 {
ti,hwmods = "uart1";
clock-frequency = <48000000>;
reg = <0x44e09000 0x2000>;
interrupt-parent = <&intc>;
interrupts = <72>;
status = "disabled";
};
@ -149,7 +145,6 @@ uart2: serial@48022000 {
ti,hwmods = "uart2";
clock-frequency = <48000000>;
reg = <0x48022000 0x2000>;
interrupt-parent = <&intc>;
interrupts = <73>;
status = "disabled";
};
@ -159,7 +154,6 @@ uart3: serial@48024000 {
ti,hwmods = "uart3";
clock-frequency = <48000000>;
reg = <0x48024000 0x2000>;
interrupt-parent = <&intc>;
interrupts = <74>;
status = "disabled";
};
@ -169,7 +163,6 @@ uart4: serial@481a6000 {
ti,hwmods = "uart4";
clock-frequency = <48000000>;
reg = <0x481a6000 0x2000>;
interrupt-parent = <&intc>;
interrupts = <44>;
status = "disabled";
};
@ -179,7 +172,6 @@ uart5: serial@481a8000 {
ti,hwmods = "uart5";
clock-frequency = <48000000>;
reg = <0x481a8000 0x2000>;
interrupt-parent = <&intc>;
interrupts = <45>;
status = "disabled";
};
@ -189,7 +181,6 @@ uart6: serial@481aa000 {
ti,hwmods = "uart6";
clock-frequency = <48000000>;
reg = <0x481aa000 0x2000>;
interrupt-parent = <&intc>;
interrupts = <46>;
status = "disabled";
};
@ -200,7 +191,6 @@ i2c1: i2c@44e0b000 {
#size-cells = <0>;
ti,hwmods = "i2c1";
reg = <0x44e0b000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <70>;
status = "disabled";
};
@ -211,7 +201,6 @@ i2c2: i2c@4802a000 {
#size-cells = <0>;
ti,hwmods = "i2c2";
reg = <0x4802a000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <71>;
status = "disabled";
};
@ -222,7 +211,6 @@ i2c3: i2c@4819c000 {
#size-cells = <0>;
ti,hwmods = "i2c3";
reg = <0x4819c000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <30>;
status = "disabled";
};
@ -231,7 +219,6 @@ wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
reg = <0x44e35000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <91>;
};
@ -240,7 +227,6 @@ dcan0: d_can@481cc000 {
ti,hwmods = "d_can0";
reg = <0x481cc000 0x2000>;
interrupts = <52>;
interrupt-parent = <&intc>;
status = "disabled";
};
@ -249,7 +235,6 @@ dcan1: d_can@481d0000 {
ti,hwmods = "d_can1";
reg = <0x481d0000 0x2000>;
interrupts = <55>;
interrupt-parent = <&intc>;
status = "disabled";
};
};

1
arch/arm/boot/dts/omap2.dtsi
View File

@ -12,6 +12,7 @@
/ {
compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
interrupt-parent = <&intc>;
aliases {
serial0 = &uart1;

2
arch/arm/boot/dts/omap2420.dtsi
View File

@ -30,7 +30,6 @@ mcbsp1: mcbsp@48074000 {
interrupts = <59>, /* TX interrupt */
<60>; /* RX interrupt */
interrupt-names = "tx", "rx";
interrupt-parent = <&intc>;
ti,hwmods = "mcbsp1";
};
@ -41,7 +40,6 @@ mcbsp2: mcbsp@48076000 {
interrupts = <62>, /* TX interrupt */
<63>; /* RX interrupt */
interrupt-names = "tx", "rx";
interrupt-parent = <&intc>;
ti,hwmods = "mcbsp2";
};
};

5
arch/arm/boot/dts/omap2430.dtsi
View File

@ -32,7 +32,6 @@ mcbsp1: mcbsp@48074000 {
<60>, /* RX interrupt */
<61>; /* RX overflow interrupt */
interrupt-names = "common", "tx", "rx", "rx_overflow";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp1";
};
@ -45,7 +44,6 @@ mcbsp2: mcbsp@48076000 {
<62>, /* TX interrupt */
<63>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp2";
};
@ -58,7 +56,6 @@ mcbsp3: mcbsp@4808c000 {
<89>, /* TX interrupt */
<90>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp3";
};
@ -71,7 +68,6 @@ mcbsp4: mcbsp@4808e000 {
<54>, /* TX interrupt */
<55>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp4";
};
@ -84,7 +80,6 @@ mcbsp5: mcbsp@48096000 {
<81>, /* TX interrupt */
<82>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp5";
};

6
arch/arm/boot/dts/omap3.dtsi
View File

@ -12,6 +12,7 @@
/ {
compatible = "ti,omap3430", "ti,omap3";
interrupt-parent = <&intc>;
aliases {
serial0 = &uart1;
@ -240,7 +241,6 @@ mcbsp1: mcbsp@48074000 {
<59>, /* TX interrupt */
<60>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp1";
};
@ -255,7 +255,6 @@ mcbsp2: mcbsp@49022000 {
<63>, /* RX interrupt */
<4>; /* Sidetone */
interrupt-names = "common", "tx", "rx", "sidetone";
interrupt-parent = <&intc>;
ti,buffer-size = <1280>;
ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
};
@ -270,7 +269,6 @@ mcbsp3: mcbsp@49024000 {
<90>, /* RX interrupt */
<5>; /* Sidetone */
interrupt-names = "common", "tx", "rx", "sidetone";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
};
@ -283,7 +281,6 @@ mcbsp4: mcbsp@49026000 {
<54>, /* TX interrupt */
<55>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp4";
};
@ -296,7 +293,6 @@ mcbsp5: mcbsp@48096000 {
<81>, /* TX interrupt */
<82>; /* RX interrupt */
interrupt-names = "common", "tx", "rx";
interrupt-parent = <&intc>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp5";
};

6
arch/arm/boot/dts/omap4.dtsi
View File

@ -340,7 +340,6 @@ mcpdm: mcpdm@40132000 {
<0x49032000 0x7f>; /* L3 Interconnect */
reg-names = "mpu", "dma";
interrupts = <0 112 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "mcpdm";
};
@ -350,7 +349,6 @@ dmic: dmic@4012e000 {
<0x4902e000 0x7f>; /* L3 Interconnect */
reg-names = "mpu", "dma";
interrupts = <0 114 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "dmic";
};
@ -361,7 +359,6 @@ mcbsp1: mcbsp@40122000 {
reg-names = "mpu", "dma";
interrupts = <0 17 0x4>;
interrupt-names = "common";
interrupt-parent = <&gic>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp1";
};
@ -373,7 +370,6 @@ mcbsp2: mcbsp@40124000 {
reg-names = "mpu", "dma";
interrupts = <0 22 0x4>;
interrupt-names = "common";
interrupt-parent = <&gic>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp2";
};
@ -385,7 +381,6 @@ mcbsp3: mcbsp@40126000 {
reg-names = "mpu", "dma";
interrupts = <0 23 0x4>;
interrupt-names = "common";
interrupt-parent = <&gic>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp3";
};
@ -396,7 +391,6 @@ mcbsp4: mcbsp@48096000 {
reg-names = "mpu";
interrupts = <0 16 0x4>;
interrupt-names = "common";
interrupt-parent = <&gic>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp4";
};

5
arch/arm/boot/dts/omap5.dtsi
View File

@ -287,7 +287,6 @@ mcpdm: mcpdm@40132000 {
<0x49032000 0x7f>; /* L3 Interconnect */
reg-names = "mpu", "dma";
interrupts = <0 112 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "mcpdm";
};
@ -297,7 +296,6 @@ dmic: dmic@4012e000 {
<0x4902e000 0x7f>; /* L3 Interconnect */
reg-names = "mpu", "dma";
interrupts = <0 114 0x4>;
interrupt-parent = <&gic>;
ti,hwmods = "dmic";
};
@ -308,7 +306,6 @@ mcbsp1: mcbsp@40122000 {
reg-names = "mpu", "dma";
interrupts = <0 17 0x4>;
interrupt-names = "common";
interrupt-parent = <&gic>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp1";
};
@ -320,7 +317,6 @@ mcbsp2: mcbsp@40124000 {
reg-names = "mpu", "dma";
interrupts = <0 22 0x4>;
interrupt-names = "common";
interrupt-parent = <&gic>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp2";
};
@ -332,7 +328,6 @@ mcbsp3: mcbsp@40126000 {
reg-names = "mpu", "dma";
interrupts = <0 23 0x4>;
interrupt-names = "common";
interrupt-parent = <&gic>;
ti,buffer-size = <128>;
ti,hwmods = "mcbsp3";
};