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drm/i915/gvt: Make PTE iterator 64K entry aware
64K PTE is special, only PTE#0, PTE#16, PTE#32, ... PTE#496 are used in the page table. Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@ -351,6 +351,8 @@ static inline int gtt_set_entry64(void *pt,
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#define GTT_SPTE_FLAG_MASK GENMASK_ULL(62, 52)
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#define GTT_SPTE_FLAG_64K_SPLITED BIT(52) /* splited 64K gtt entry */
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#define GTT_64K_PTE_STRIDE 16
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static unsigned long gen8_gtt_get_pfn(struct intel_gvt_gtt_entry *e)
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{
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unsigned long pfn;
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@ -889,12 +891,14 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt_gfn(
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(I915_GTT_PAGE_SIZE >> pt_entry_size_shift(spt))
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#define for_each_present_guest_entry(spt, e, i) \
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for (i = 0; i < pt_entries(spt); i++) \
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for (i = 0; i < pt_entries(spt); \
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i += spt->guest_page.pde_ips ? GTT_64K_PTE_STRIDE : 1) \
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if (!ppgtt_get_guest_entry(spt, e, i) && \
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spt->vgpu->gvt->gtt.pte_ops->test_present(e))
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#define for_each_present_shadow_entry(spt, e, i) \
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for (i = 0; i < pt_entries(spt); i++) \
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for (i = 0; i < pt_entries(spt); \
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i += spt->shadow_page.pde_ips ? GTT_64K_PTE_STRIDE : 1) \
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if (!ppgtt_get_shadow_entry(spt, e, i) && \
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spt->vgpu->gvt->gtt.pte_ops->test_present(e))
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