From 5edcebb96b2f6815f94d7030408cbe08c0dd4b80 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Mon, 21 Nov 2016 10:25:34 +0100 Subject: [PATCH 1/3] arm64: tegra: Use symbolic HSP identifiers Now that the corresponding device tree binding include has been merged, convert the DTS files to use symbolic names instead of numeric ones. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index a918e10240fd..e3ef2f1b97f4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1,5 +1,6 @@ #include #include +#include / { compatible = "nvidia,tegra186"; @@ -369,7 +370,8 @@ cpu@5 { bpmp: bpmp { compatible = "nvidia,tegra186-bpmp"; - mboxes = <&hsp_top0 0 19>; + mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB + TEGRA_HSP_DB_MASTER_BPMP>; shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>; #clock-cells = <1>; #reset-cells = <1>; From c58f5f88483974adebc49996b3cbfd89e944222f Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Mon, 21 Nov 2016 10:25:36 +0100 Subject: [PATCH 2/3] arm64: tegra: Use symbolic clock identifiers Now that the corresponding device tree binding include has been merged, convert the DTS files to use symbolic names instead of numeric ones. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 41 ++++++++++++------------ 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index e3ef2f1b97f4..910315f579c4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1,3 +1,4 @@ +#include #include #include #include @@ -30,7 +31,7 @@ uarta: serial@3100000 { reg = <0x0 0x03100000 0x0 0x40>; reg-shift = <2>; interrupts = ; - clocks = <&bpmp 55>; + clocks = <&bpmp TEGRA186_CLK_UARTA>; clock-names = "serial"; resets = <&bpmp 47>; reset-names = "serial"; @@ -42,7 +43,7 @@ uartb: serial@3110000 { reg = <0x0 0x03110000 0x0 0x40>; reg-shift = <2>; interrupts = ; - clocks = <&bpmp 56>; + clocks = <&bpmp TEGRA186_CLK_UARTB>; clock-names = "serial"; resets = <&bpmp 48>; reset-names = "serial"; @@ -54,7 +55,7 @@ uartd: serial@3130000 { reg = <0x0 0x03130000 0x0 0x40>; reg-shift = <2>; interrupts = ; - clocks = <&bpmp 77>; + clocks = <&bpmp TEGRA186_CLK_UARTD>; clock-names = "serial"; resets = <&bpmp 50>; reset-names = "serial"; @@ -66,7 +67,7 @@ uarte: serial@3140000 { reg = <0x0 0x03140000 0x0 0x40>; reg-shift = <2>; interrupts = ; - clocks = <&bpmp 194>; + clocks = <&bpmp TEGRA186_CLK_UARTE>; clock-names = "serial"; resets = <&bpmp 132>; reset-names = "serial"; @@ -78,7 +79,7 @@ uartf: serial@3150000 { reg = <0x0 0x03150000 0x0 0x40>; reg-shift = <2>; interrupts = ; - clocks = <&bpmp 195>; + clocks = <&bpmp TEGRA186_CLK_UARTF>; clock-names = "serial"; resets = <&bpmp 111>; reset-names = "serial"; @@ -91,7 +92,7 @@ gen1_i2c: i2c@3160000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 47>; + clocks = <&bpmp TEGRA186_CLK_I2C1>; clock-names = "div-clk"; resets = <&bpmp 19>; reset-names = "i2c"; @@ -104,7 +105,7 @@ cam_i2c: i2c@3180000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 75>; + clocks = <&bpmp TEGRA186_CLK_I2C3>; clock-names = "div-clk"; resets = <&bpmp 21>; reset-names = "i2c"; @@ -118,7 +119,7 @@ dp_aux_ch1_i2c: i2c@3190000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 86>; + clocks = <&bpmp TEGRA186_CLK_I2C4>; clock-names = "div-clk"; resets = <&bpmp 22>; reset-names = "i2c"; @@ -132,7 +133,7 @@ pwr_i2c: i2c@31a0000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 48>; + clocks = <&bpmp TEGRA186_CLK_I2C5>; clock-names = "div-clk"; resets = <&bpmp 23>; reset-names = "i2c"; @@ -146,7 +147,7 @@ dp_aux_ch0_i2c: i2c@31b0000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 125>; + clocks = <&bpmp TEGRA186_CLK_I2C6>; clock-names = "div-clk"; resets = <&bpmp 24>; reset-names = "i2c"; @@ -159,7 +160,7 @@ gen7_i2c: i2c@31c0000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 182>; + clocks = <&bpmp TEGRA186_CLK_I2C7>; clock-names = "div-clk"; resets = <&bpmp 81>; reset-names = "i2c"; @@ -172,7 +173,7 @@ gen9_i2c: i2c@31e0000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 183>; + clocks = <&bpmp TEGRA186_CLK_I2C9>; clock-names = "div-clk"; resets = <&bpmp 83>; reset-names = "i2c"; @@ -183,7 +184,7 @@ sdmmc1: sdhci@3400000 { compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03400000 0x0 0x10000>; interrupts = ; - clocks = <&bpmp 52>; + clocks = <&bpmp TEGRA186_CLK_SDMMC1>; clock-names = "sdhci"; resets = <&bpmp 33>; reset-names = "sdhci"; @@ -194,7 +195,7 @@ sdmmc2: sdhci@3420000 { compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03420000 0x0 0x10000>; interrupts = ; - clocks = <&bpmp 53>; + clocks = <&bpmp TEGRA186_CLK_SDMMC2>; clock-names = "sdhci"; resets = <&bpmp 34>; reset-names = "sdhci"; @@ -205,7 +206,7 @@ sdmmc3: sdhci@3440000 { compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03440000 0x0 0x10000>; interrupts = ; - clocks = <&bpmp 76>; + clocks = <&bpmp TEGRA186_CLK_SDMMC3>; clock-names = "sdhci"; resets = <&bpmp 35>; reset-names = "sdhci"; @@ -216,7 +217,7 @@ sdmmc4: sdhci@3460000 { compatible = "nvidia,tegra186-sdhci"; reg = <0x0 0x03460000 0x0 0x10000>; interrupts = ; - clocks = <&bpmp 54>; + clocks = <&bpmp TEGRA186_CLK_SDMMC4>; clock-names = "sdhci"; resets = <&bpmp 36>; reset-names = "sdhci"; @@ -249,7 +250,7 @@ gen2_i2c: i2c@c240000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 218>; + clocks = <&bpmp TEGRA186_CLK_I2C2>; clock-names = "div-clk"; resets = <&bpmp 20>; reset-names = "i2c"; @@ -262,7 +263,7 @@ gen8_i2c: i2c@c250000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; - clocks = <&bpmp 219>; + clocks = <&bpmp TEGRA186_CLK_I2C8>; clock-names = "div-clk"; resets = <&bpmp 82>; reset-names = "i2c"; @@ -274,7 +275,7 @@ uartc: serial@c280000 { reg = <0x0 0x0c280000 0x0 0x40>; reg-shift = <2>; interrupts = ; - clocks = <&bpmp 215>; + clocks = <&bpmp TEGRA186_CLK_UARTC>; clock-names = "serial"; resets = <&bpmp 49>; reset-names = "serial"; @@ -286,7 +287,7 @@ uartg: serial@c290000 { reg = <0x0 0x0c290000 0x0 0x40>; reg-shift = <2>; interrupts = ; - clocks = <&bpmp 216>; + clocks = <&bpmp TEGRA186_CLK_UARTG>; clock-names = "serial"; resets = <&bpmp 112>; reset-names = "serial"; From 7bcf266462da736ae4b42d5c73cd5dc0da540772 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Mon, 21 Nov 2016 10:25:31 +0100 Subject: [PATCH 3/3] arm64: tegra: Use symbolic reset identifiers Now that the corresponding device tree binding include has been merged, convert the DTS files to use symbolic names instead of numeric ones. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 41 ++++++++++++------------ 1 file changed, 21 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 910315f579c4..62fa85ae0271 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -2,6 +2,7 @@ #include #include #include +#include / { compatible = "nvidia,tegra186"; @@ -33,7 +34,7 @@ uarta: serial@3100000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTA>; clock-names = "serial"; - resets = <&bpmp 47>; + resets = <&bpmp TEGRA186_RESET_UARTA>; reset-names = "serial"; status = "disabled"; }; @@ -45,7 +46,7 @@ uartb: serial@3110000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTB>; clock-names = "serial"; - resets = <&bpmp 48>; + resets = <&bpmp TEGRA186_RESET_UARTB>; reset-names = "serial"; status = "disabled"; }; @@ -57,7 +58,7 @@ uartd: serial@3130000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTD>; clock-names = "serial"; - resets = <&bpmp 50>; + resets = <&bpmp TEGRA186_RESET_UARTD>; reset-names = "serial"; status = "disabled"; }; @@ -69,7 +70,7 @@ uarte: serial@3140000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTE>; clock-names = "serial"; - resets = <&bpmp 132>; + resets = <&bpmp TEGRA186_RESET_UARTE>; reset-names = "serial"; status = "disabled"; }; @@ -81,7 +82,7 @@ uartf: serial@3150000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTF>; clock-names = "serial"; - resets = <&bpmp 111>; + resets = <&bpmp TEGRA186_RESET_UARTF>; reset-names = "serial"; status = "disabled"; }; @@ -94,7 +95,7 @@ gen1_i2c: i2c@3160000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C1>; clock-names = "div-clk"; - resets = <&bpmp 19>; + resets = <&bpmp TEGRA186_RESET_I2C1>; reset-names = "i2c"; status = "disabled"; }; @@ -107,7 +108,7 @@ cam_i2c: i2c@3180000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C3>; clock-names = "div-clk"; - resets = <&bpmp 21>; + resets = <&bpmp TEGRA186_RESET_I2C3>; reset-names = "i2c"; status = "disabled"; }; @@ -121,7 +122,7 @@ dp_aux_ch1_i2c: i2c@3190000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C4>; clock-names = "div-clk"; - resets = <&bpmp 22>; + resets = <&bpmp TEGRA186_RESET_I2C4>; reset-names = "i2c"; status = "disabled"; }; @@ -135,7 +136,7 @@ pwr_i2c: i2c@31a0000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C5>; clock-names = "div-clk"; - resets = <&bpmp 23>; + resets = <&bpmp TEGRA186_RESET_I2C5>; reset-names = "i2c"; status = "disabled"; }; @@ -149,7 +150,7 @@ dp_aux_ch0_i2c: i2c@31b0000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C6>; clock-names = "div-clk"; - resets = <&bpmp 24>; + resets = <&bpmp TEGRA186_RESET_I2C6>; reset-names = "i2c"; status = "disabled"; }; @@ -162,7 +163,7 @@ gen7_i2c: i2c@31c0000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C7>; clock-names = "div-clk"; - resets = <&bpmp 81>; + resets = <&bpmp TEGRA186_RESET_I2C7>; reset-names = "i2c"; status = "disabled"; }; @@ -175,7 +176,7 @@ gen9_i2c: i2c@31e0000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C9>; clock-names = "div-clk"; - resets = <&bpmp 83>; + resets = <&bpmp TEGRA186_RESET_I2C9>; reset-names = "i2c"; status = "disabled"; }; @@ -186,7 +187,7 @@ sdmmc1: sdhci@3400000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC1>; clock-names = "sdhci"; - resets = <&bpmp 33>; + resets = <&bpmp TEGRA186_RESET_SDMMC1>; reset-names = "sdhci"; status = "disabled"; }; @@ -197,7 +198,7 @@ sdmmc2: sdhci@3420000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC2>; clock-names = "sdhci"; - resets = <&bpmp 34>; + resets = <&bpmp TEGRA186_RESET_SDMMC2>; reset-names = "sdhci"; status = "disabled"; }; @@ -208,7 +209,7 @@ sdmmc3: sdhci@3440000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC3>; clock-names = "sdhci"; - resets = <&bpmp 35>; + resets = <&bpmp TEGRA186_RESET_SDMMC3>; reset-names = "sdhci"; status = "disabled"; }; @@ -219,7 +220,7 @@ sdmmc4: sdhci@3460000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_SDMMC4>; clock-names = "sdhci"; - resets = <&bpmp 36>; + resets = <&bpmp TEGRA186_RESET_SDMMC4>; reset-names = "sdhci"; status = "disabled"; }; @@ -252,7 +253,7 @@ gen2_i2c: i2c@c240000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C2>; clock-names = "div-clk"; - resets = <&bpmp 20>; + resets = <&bpmp TEGRA186_RESET_I2C2>; reset-names = "i2c"; status = "disabled"; }; @@ -265,7 +266,7 @@ gen8_i2c: i2c@c250000 { #size-cells = <0>; clocks = <&bpmp TEGRA186_CLK_I2C8>; clock-names = "div-clk"; - resets = <&bpmp 82>; + resets = <&bpmp TEGRA186_RESET_I2C8>; reset-names = "i2c"; status = "disabled"; }; @@ -277,7 +278,7 @@ uartc: serial@c280000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTC>; clock-names = "serial"; - resets = <&bpmp 49>; + resets = <&bpmp TEGRA186_RESET_UARTC>; reset-names = "serial"; status = "disabled"; }; @@ -289,7 +290,7 @@ uartg: serial@c290000 { interrupts = ; clocks = <&bpmp TEGRA186_CLK_UARTG>; clock-names = "serial"; - resets = <&bpmp 112>; + resets = <&bpmp TEGRA186_RESET_UARTG>; reset-names = "serial"; status = "disabled"; };