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spi: spi-mem: allow specifying whether an op is DTR or not
Each phase is given a separate 'dtr' field so mixed protocols like 4S-4D-4D can be supported. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200623183030.26591-2-p.yadav@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -156,6 +156,9 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
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op->data.dir == SPI_MEM_DATA_OUT))
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return false;
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if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr)
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return false;
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return true;
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}
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EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
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@ -71,9 +71,11 @@ enum spi_mem_data_dir {
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* struct spi_mem_op - describes a SPI memory operation
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* @cmd.buswidth: number of IO lines used to transmit the command
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* @cmd.opcode: operation opcode
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* @cmd.dtr: whether the command opcode should be sent in DTR mode or not
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* @addr.nbytes: number of address bytes to send. Can be zero if the operation
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* does not need to send an address
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* @addr.buswidth: number of IO lines used to transmit the address cycles
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* @addr.dtr: whether the address should be sent in DTR mode or not
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* @addr.val: address value. This value is always sent MSB first on the bus.
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* Note that only @addr.nbytes are taken into account in this
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* address value, so users should make sure the value fits in the
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@ -81,7 +83,9 @@ enum spi_mem_data_dir {
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* @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
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* be zero if the operation does not require dummy bytes
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* @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
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* @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not
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* @data.buswidth: number of IO lanes used to send/receive the data
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* @data.dtr: whether the data should be sent in DTR mode or not
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* @data.dir: direction of the transfer
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* @data.nbytes: number of data bytes to send/receive. Can be zero if the
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* operation does not involve transferring data
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@ -91,22 +95,26 @@ enum spi_mem_data_dir {
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struct spi_mem_op {
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struct {
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u8 buswidth;
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u8 dtr : 1;
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u8 opcode;
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} cmd;
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struct {
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u8 nbytes;
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u8 buswidth;
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u8 dtr : 1;
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u64 val;
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} addr;
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struct {
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u8 nbytes;
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u8 buswidth;
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u8 dtr : 1;
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} dummy;
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struct {
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u8 buswidth;
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u8 dtr : 1;
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enum spi_mem_data_dir dir;
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unsigned int nbytes;
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union {
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