mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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cris: use generic io.h
fixes the warning:
lib/iomap.c: In function ‘ioread8_rep’:
./arch/cris/include/asm/io.h:139:31: warning: statement with no effect [-Wunused-value]
#define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0)
^
lib/iomap.c:56:3: note: in definition of macro ‘IO_COND’
is_pio; \
^
lib/iomap.c:197:16: note: in expansion of macro ‘insb’
IO_COND(addr, insb(port,dst,count), mmio_insb(addr, dst, count));
^
cris_iops was previously set to NULL (no matter if CONFIG_PCI was set or
not), but was removed in commit ab28e96fd1 ("CRIS v32: remove old GPIO
and LEDs code"). Before commit ab28e96fd1 ("CRIS v32: remove old GPIO
and LEDs code"), cris_iops could have been set from an external module,
since it was exported, but as commit c24bf9b4cc ("CRIS: fix I/O
macros") noted, the macros using cris_iops have been broken since first
included, so they could never have worked.
Because of this, instead of readding cris_iops, remove all special
handling of cris_iops. By doing so, we can rely on the default
implementation of almost all functions previously defined in our arch
specific io.h.
Signed-off-by: Niklas Cassel <nks@flawful.org>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
This commit is contained in:
Niklas Cassel
Jesper Nilsson
parent
2765262f7b
commit
4c241d3c7b
@ -8,34 +8,6 @@
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#include <asm-generic/iomap.h>
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#include <linux/kernel.h>
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struct cris_io_operations
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{
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u32 (*read_mem)(void *addr, int size);
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void (*write_mem)(u32 val, int size, void *addr);
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u32 (*read_io)(u32 port, void *addr, int size, int count);
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void (*write_io)(u32 port, void *addr, int size, int count);
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};
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#ifdef CONFIG_PCI
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extern struct cris_io_operations *cris_iops;
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#else
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#define cris_iops ((struct cris_io_operations*)NULL)
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#endif
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/*
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* Change virtual addresses to physical addresses and vv.
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*/
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static inline unsigned long virt_to_phys(volatile void * address)
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{
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return __pa(address);
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}
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static inline void * phys_to_virt(unsigned long address)
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{
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return __va(address);
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}
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extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
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extern void __iomem * __ioremap_prot(unsigned long phys_addr, unsigned long size, pgprot_t prot);
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@ -48,147 +20,6 @@ extern void iounmap(volatile void * __iomem addr);
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extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
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/*
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* IO bus memory addresses are also 1:1 with the physical address
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*/
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#define virt_to_bus virt_to_phys
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#define bus_to_virt phys_to_virt
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/*
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* readX/writeX() are used to access memory mapped devices. On some
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* architectures the memory mapped IO stuff needs to be accessed
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* differently. On the CRIS architecture, we just read/write the
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* memory location directly.
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*/
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#ifdef CONFIG_PCI
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#define PCI_SPACE(x) ((((unsigned)(x)) & 0x10000000) == 0x10000000)
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#else
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#define PCI_SPACE(x) 0
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#endif
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static inline unsigned char readb(const volatile void __iomem *addr)
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{
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if (PCI_SPACE(addr) && cris_iops)
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return cris_iops->read_mem((void*)addr, 1);
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else
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return *(volatile unsigned char __force *) addr;
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}
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static inline unsigned short readw(const volatile void __iomem *addr)
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{
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if (PCI_SPACE(addr) && cris_iops)
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return cris_iops->read_mem((void*)addr, 2);
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else
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return *(volatile unsigned short __force *) addr;
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}
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static inline unsigned int readl(const volatile void __iomem *addr)
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{
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if (PCI_SPACE(addr) && cris_iops)
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return cris_iops->read_mem((void*)addr, 4);
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else
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return *(volatile unsigned int __force *) addr;
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}
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#define readb_relaxed(addr) readb(addr)
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#define readw_relaxed(addr) readw(addr)
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#define readl_relaxed(addr) readl(addr)
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#define __raw_readb readb
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#define __raw_readw readw
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#define __raw_readl readl
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static inline void writeb(unsigned char b, volatile void __iomem *addr)
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{
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if (PCI_SPACE(addr) && cris_iops)
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cris_iops->write_mem(b, 1, (void*)addr);
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else
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*(volatile unsigned char __force *) addr = b;
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}
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static inline void writew(unsigned short b, volatile void __iomem *addr)
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{
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if (PCI_SPACE(addr) && cris_iops)
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cris_iops->write_mem(b, 2, (void*)addr);
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else
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*(volatile unsigned short __force *) addr = b;
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}
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static inline void writel(unsigned int b, volatile void __iomem *addr)
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{
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if (PCI_SPACE(addr) && cris_iops)
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cris_iops->write_mem(b, 4, (void*)addr);
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else
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*(volatile unsigned int __force *) addr = b;
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}
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#define writeb_relaxed(b, addr) writeb(b, addr)
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#define writew_relaxed(b, addr) writew(b, addr)
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#define writel_relaxed(b, addr) writel(b, addr)
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#define __raw_writeb writeb
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#define __raw_writew writew
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#define __raw_writel writel
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#define mmiowb()
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#define memset_io(a,b,c) memset((void *)(a),(b),(c))
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#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
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#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
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/* I/O port access. Normally there is no I/O space on CRIS but when
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* Cardbus/PCI is enabled the request is passed through the bridge.
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*/
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#define IO_SPACE_LIMIT 0xffff
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#define inb(port) (cris_iops ? cris_iops->read_io(port,NULL,1,1) : 0)
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#define inw(port) (cris_iops ? cris_iops->read_io(port,NULL,2,1) : 0)
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#define inl(port) (cris_iops ? cris_iops->read_io(port,NULL,4,1) : 0)
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#define insb(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,1,count) : 0)
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#define insw(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,2,count) : 0)
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#define insl(port,addr,count) (cris_iops ? cris_iops->read_io(port,addr,4,count) : 0)
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static inline void outb(unsigned char data, unsigned int port)
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{
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if (cris_iops)
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cris_iops->write_io(port, (void *) &data, 1, 1);
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}
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static inline void outw(unsigned short data, unsigned int port)
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{
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if (cris_iops)
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cris_iops->write_io(port, (void *) &data, 2, 1);
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}
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static inline void outl(unsigned int data, unsigned int port)
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{
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if (cris_iops)
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cris_iops->write_io(port, (void *) &data, 4, 1);
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}
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static inline void outsb(unsigned int port, const void *addr,
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unsigned long count)
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{
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if (cris_iops)
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cris_iops->write_io(port, (void *)addr, 1, count);
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}
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static inline void outsw(unsigned int port, const void *addr,
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unsigned long count)
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{
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if (cris_iops)
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cris_iops->write_io(port, (void *)addr, 2, count);
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}
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static inline void outsl(unsigned int port, const void *addr,
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unsigned long count)
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{
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if (cris_iops)
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cris_iops->write_io(port, (void *)addr, 4, count);
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}
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#define inb_p(port) inb(port)
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#define inw_p(port) inw(port)
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#define inl_p(port) inl(port)
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#define outb_p(val, port) outb((val), (port))
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#define outw_p(val, port) outw((val), (port))
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#define outl_p(val, port) outl((val), (port))
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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#include <asm-generic/io.h>
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#endif
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