AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-23 16:09:57 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

drm/i915: swap() the entire cdclk state

Browse Source 
To make life less confusing let's swap() the entire cdclk state
rather than swapping some parts, copying other parts, and leaving
the rest just as is.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-11-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
This commit is contained in:
Ville Syrjälä 2020-01-20 19:47:20 +02:00
parent 1965de63a9
commit 4c029c499f
1 changed files with 3 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/drm/i915/display/intel_cdclk.c
View File

@ -1851,19 +1851,7 @@ void intel_cdclk_swap_state(struct intel_atomic_state *state)
{ {
struct drm_i915_private *dev_priv = to_i915(state->base.dev); struct drm_i915_private *dev_priv = to_i915(state->base.dev);
/* FIXME maybe swap() these too */ swap(state->cdclk_state, dev_priv->cdclk_state);
memcpy(dev_priv->cdclk_state.min_cdclk,
state->cdclk_state.min_cdclk,
sizeof(state->cdclk_state.min_cdclk));
memcpy(dev_priv->cdclk_state.min_voltage_level,
state->cdclk_state.min_voltage_level,
sizeof(state->cdclk_state.min_voltage_level));
dev_priv->cdclk_state.force_min_cdclk =
state->cdclk_state.force_min_cdclk;
swap(state->cdclk_state.logical, dev_priv->cdclk_state.logical);
swap(state->cdclk_state.actual, dev_priv->cdclk_state.actual);
} }
void intel_dump_cdclk_config(const struct intel_cdclk_config *cdclk_config, void intel_dump_cdclk_config(const struct intel_cdclk_config *cdclk_config,
@ -1919,7 +1907,7 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state)
/* called after intel_cdclk_swap_state()! */ /* called after intel_cdclk_swap_state()! */
const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state; const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state;
const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state; const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state;
enum pipe pipe = old_cdclk_state->pipe; /* not swapped */ enum pipe pipe = new_cdclk_state->pipe;
if (pipe == INVALID_PIPE || if (pipe == INVALID_PIPE ||
old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk) old_cdclk_state->actual.cdclk <= new_cdclk_state->actual.cdclk)
@ -1940,7 +1928,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)
/* called after intel_cdclk_swap_state()! */ /* called after intel_cdclk_swap_state()! */
const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state; const struct intel_cdclk_state *old_cdclk_state = &state->cdclk_state;
const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state; const struct intel_cdclk_state *new_cdclk_state = &dev_priv->cdclk_state;
enum pipe pipe = old_cdclk_state->pipe; /* not swapped */ enum pipe pipe = new_cdclk_state->pipe;
if (pipe != INVALID_PIPE && if (pipe != INVALID_PIPE &&
old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk) old_cdclk_state->actual.cdclk > new_cdclk_state->actual.cdclk)