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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/amd/display: Move view port registers and programming to memory input.
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Vitaly Prosyak
Alex Deucher
parent
b02c3b055f
commit
4bd3ae5fb5
@ -452,37 +452,6 @@ static void dpp_set_scl_filter(
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}
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}
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static void dpp_set_viewport(
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struct dcn10_dpp *xfm,
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const struct rect *viewport,
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const struct rect *viewport_c)
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{
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REG_SET_2(DCSURF_PRI_VIEWPORT_DIMENSION, 0,
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PRI_VIEWPORT_WIDTH, viewport->width,
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PRI_VIEWPORT_HEIGHT, viewport->height);
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REG_SET_2(DCSURF_PRI_VIEWPORT_START, 0,
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PRI_VIEWPORT_X_START, viewport->x,
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PRI_VIEWPORT_Y_START, viewport->y);
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/*for stereo*/
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REG_SET_2(DCSURF_SEC_VIEWPORT_DIMENSION, 0,
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SEC_VIEWPORT_WIDTH, viewport->width,
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SEC_VIEWPORT_HEIGHT, viewport->height);
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REG_SET_2(DCSURF_SEC_VIEWPORT_START, 0,
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SEC_VIEWPORT_X_START, viewport->x,
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SEC_VIEWPORT_Y_START, viewport->y);
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/* DC supports NV12 only at the moment */
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REG_SET_2(DCSURF_PRI_VIEWPORT_DIMENSION_C, 0,
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PRI_VIEWPORT_WIDTH_C, viewport_c->width,
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PRI_VIEWPORT_HEIGHT_C, viewport_c->height);
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REG_SET_2(DCSURF_PRI_VIEWPORT_START_C, 0,
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PRI_VIEWPORT_X_START_C, viewport_c->x,
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PRI_VIEWPORT_Y_START_C, viewport_c->y);
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}
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static int get_lb_depth_bpc(enum lb_pixel_depth depth)
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{
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@ -616,8 +585,6 @@ void dpp_set_scaler_auto_scale(
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REG_UPDATE(SCL_MODE, DSCL_MODE, dscl_mode);
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dpp_set_viewport(xfm, &scl_data->viewport, &scl_data->viewport_c);
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if (dscl_mode == DSCL_MODE_DSCL_BYPASS)
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return;
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@ -762,9 +729,6 @@ static void dpp_set_scaler_manual_scale(
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/* SCL mode */
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REG_UPDATE(SCL_MODE, DSCL_MODE, dscl_mode);
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/* Viewport */
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dpp_set_viewport(xfm, &scl_data->viewport, &scl_data->viewport_c);
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if (dscl_mode == DSCL_MODE_DSCL_BYPASS)
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return;
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/* LB */
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@ -59,12 +59,6 @@
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SRI(SCL_COEF_RAM_TAP_SELECT, DSCL, id), \
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SRI(SCL_COEF_RAM_TAP_DATA, DSCL, id), \
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SRI(DSCL_2TAP_CONTROL, DSCL, id), \
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SRI(DCSURF_PRI_VIEWPORT_DIMENSION, HUBP, id), \
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SRI(DCSURF_PRI_VIEWPORT_START, HUBP, id), \
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SRI(DCSURF_SEC_VIEWPORT_DIMENSION, HUBP, id), \
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SRI(DCSURF_SEC_VIEWPORT_START, HUBP, id), \
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SRI(DCSURF_PRI_VIEWPORT_DIMENSION_C, HUBP, id), \
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SRI(DCSURF_PRI_VIEWPORT_START_C, HUBP, id), \
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SRI(MPC_SIZE, DSCL, id), \
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SRI(SCL_HORZ_FILTER_SCALE_RATIO, DSCL, id), \
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SRI(SCL_VERT_FILTER_SCALE_RATIO, DSCL, id), \
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@ -144,18 +138,6 @@
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TF_SF(DSCL0_DSCL_2TAP_CONTROL, SCL_V_2TAP_SHARP_EN, mask_sh),\
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TF_SF(DSCL0_DSCL_2TAP_CONTROL, SCL_V_2TAP_SHARP_FACTOR, mask_sh),\
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TF_SF(DSCL0_SCL_MODE, SCL_COEF_RAM_SELECT, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_START, PRI_VIEWPORT_X_START, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_START, PRI_VIEWPORT_Y_START, mask_sh),\
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TF_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION, SEC_VIEWPORT_WIDTH, mask_sh),\
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TF_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION, SEC_VIEWPORT_HEIGHT, mask_sh),\
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TF_SF(HUBP0_DCSURF_SEC_VIEWPORT_START, SEC_VIEWPORT_X_START, mask_sh),\
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TF_SF(HUBP0_DCSURF_SEC_VIEWPORT_START, SEC_VIEWPORT_Y_START, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C, PRI_VIEWPORT_WIDTH_C, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C, PRI_VIEWPORT_HEIGHT_C, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_START_C, PRI_VIEWPORT_X_START_C, mask_sh),\
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TF_SF(HUBP0_DCSURF_PRI_VIEWPORT_START_C, PRI_VIEWPORT_Y_START_C, mask_sh),\
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TF_SF(DSCL0_SCL_MODE, DSCL_MODE, mask_sh),\
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TF_SF(DSCL0_RECOUT_START, RECOUT_START_X, mask_sh),\
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TF_SF(DSCL0_RECOUT_START, RECOUT_START_Y, mask_sh),\
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@ -257,18 +239,6 @@
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type SCL_V_2TAP_SHARP_EN; \
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type SCL_V_2TAP_SHARP_FACTOR; \
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type SCL_COEF_RAM_SELECT; \
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type PRI_VIEWPORT_WIDTH; \
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type PRI_VIEWPORT_HEIGHT; \
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type PRI_VIEWPORT_X_START; \
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type PRI_VIEWPORT_Y_START; \
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type SEC_VIEWPORT_WIDTH; \
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type SEC_VIEWPORT_HEIGHT; \
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type SEC_VIEWPORT_X_START; \
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type SEC_VIEWPORT_Y_START; \
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type PRI_VIEWPORT_WIDTH_C; \
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type PRI_VIEWPORT_HEIGHT_C; \
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type PRI_VIEWPORT_X_START_C; \
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type PRI_VIEWPORT_Y_START_C; \
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type DSCL_MODE; \
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type RECOUT_START_X; \
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type RECOUT_START_Y; \
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@ -355,12 +325,6 @@ struct dcn_dpp_registers {
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uint32_t SCL_COEF_RAM_TAP_SELECT;
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uint32_t SCL_COEF_RAM_TAP_DATA;
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uint32_t DSCL_2TAP_CONTROL;
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uint32_t DCSURF_PRI_VIEWPORT_DIMENSION;
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uint32_t DCSURF_PRI_VIEWPORT_START;
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uint32_t DCSURF_SEC_VIEWPORT_DIMENSION;
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uint32_t DCSURF_SEC_VIEWPORT_START;
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uint32_t DCSURF_PRI_VIEWPORT_DIMENSION_C;
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uint32_t DCSURF_PRI_VIEWPORT_START_C;
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uint32_t MPC_SIZE;
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uint32_t SCL_HORZ_FILTER_SCALE_RATIO;
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uint32_t SCL_VERT_FILTER_SCALE_RATIO;
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@ -1470,6 +1470,8 @@ static void update_dchubp_dpp(
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/* scaler configuration */
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pipe_ctx->xfm->funcs->transform_set_scaler(
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pipe_ctx->xfm, &pipe_ctx->scl_data);
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mi->funcs->mem_program_viewport(mi,
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&pipe_ctx->scl_data.viewport, &pipe_ctx->scl_data.viewport_c);
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/*gamut remap*/
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program_gamut_remap(pipe_ctx);
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@ -1057,6 +1057,41 @@ static void min10_program_pte_vm(struct mem_input *mem_input,
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SYSTEM_ACCESS_MODE, 3);
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}
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static void min_set_viewport(
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struct mem_input *mem_input,
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const struct rect *viewport,
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const struct rect *viewport_c)
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{
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struct dcn10_mem_input *mi = TO_DCN10_MEM_INPUT(mem_input);
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REG_SET_2(DCSURF_PRI_VIEWPORT_DIMENSION, 0,
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PRI_VIEWPORT_WIDTH, viewport->width,
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PRI_VIEWPORT_HEIGHT, viewport->height);
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REG_SET_2(DCSURF_PRI_VIEWPORT_START, 0,
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PRI_VIEWPORT_X_START, viewport->x,
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PRI_VIEWPORT_Y_START, viewport->y);
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/*for stereo*/
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REG_SET_2(DCSURF_SEC_VIEWPORT_DIMENSION, 0,
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SEC_VIEWPORT_WIDTH, viewport->width,
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SEC_VIEWPORT_HEIGHT, viewport->height);
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REG_SET_2(DCSURF_SEC_VIEWPORT_START, 0,
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SEC_VIEWPORT_X_START, viewport->x,
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SEC_VIEWPORT_Y_START, viewport->y);
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/* DC supports NV12 only at the moment */
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REG_SET_2(DCSURF_PRI_VIEWPORT_DIMENSION_C, 0,
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PRI_VIEWPORT_WIDTH_C, viewport_c->width,
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PRI_VIEWPORT_HEIGHT_C, viewport_c->height);
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REG_SET_2(DCSURF_PRI_VIEWPORT_START_C, 0,
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PRI_VIEWPORT_X_START_C, viewport_c->x,
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PRI_VIEWPORT_Y_START_C, viewport_c->y);
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}
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static struct mem_input_funcs dcn10_mem_input_funcs = {
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.mem_input_program_display_marks = min10_program_display_marks,
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.mem_input_program_surface_flip_and_addr =
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@ -1070,9 +1105,9 @@ static struct mem_input_funcs dcn10_mem_input_funcs = {
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.mem_input_program_pte_vm = min10_program_pte_vm,
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.set_blank = min10_set_blank,
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.dcc_control = min10_dcc_control,
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.mem_program_viewport = min_set_viewport,
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};
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/*****************************************/
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/* Constructor, Destructor */
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/*****************************************/
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@ -40,6 +40,12 @@
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SRI(DCSURF_SURFACE_PITCH_C, HUBPREQ, id),\
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SRI(DCSURF_SURFACE_CONFIG, HUBP, id),\
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SRI(DCSURF_FLIP_CONTROL, HUBPREQ, id),\
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SRI(DCSURF_PRI_VIEWPORT_DIMENSION, HUBP, id), \
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SRI(DCSURF_PRI_VIEWPORT_START, HUBP, id), \
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SRI(DCSURF_SEC_VIEWPORT_DIMENSION, HUBP, id), \
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SRI(DCSURF_SEC_VIEWPORT_START, HUBP, id), \
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SRI(DCSURF_PRI_VIEWPORT_DIMENSION_C, HUBP, id), \
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SRI(DCSURF_PRI_VIEWPORT_START_C, HUBP, id), \
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SRI(DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH, HUBPREQ, id),\
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SRI(DCSURF_PRIMARY_SURFACE_ADDRESS, HUBPREQ, id),\
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SRI(DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH, HUBPREQ, id),\
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@ -164,6 +170,12 @@ struct dcn_mi_registers {
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uint32_t DCSURF_SURFACE_PITCH_C;
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uint32_t DCSURF_SURFACE_CONFIG;
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uint32_t DCSURF_FLIP_CONTROL;
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uint32_t DCSURF_PRI_VIEWPORT_DIMENSION;
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uint32_t DCSURF_PRI_VIEWPORT_START;
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uint32_t DCSURF_SEC_VIEWPORT_DIMENSION;
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uint32_t DCSURF_SEC_VIEWPORT_START;
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uint32_t DCSURF_PRI_VIEWPORT_DIMENSION_C;
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uint32_t DCSURF_PRI_VIEWPORT_START_C;
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uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
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uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
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uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
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@ -312,6 +324,18 @@ struct dcn_mi_registers {
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MI_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_TYPE, mask_sh),\
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MI_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_PENDING, mask_sh),\
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MI_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_UPDATE_LOCK, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_START, PRI_VIEWPORT_X_START, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_START, PRI_VIEWPORT_Y_START, mask_sh),\
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MI_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION, SEC_VIEWPORT_WIDTH, mask_sh),\
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MI_SF(HUBP0_DCSURF_SEC_VIEWPORT_DIMENSION, SEC_VIEWPORT_HEIGHT, mask_sh),\
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MI_SF(HUBP0_DCSURF_SEC_VIEWPORT_START, SEC_VIEWPORT_X_START, mask_sh),\
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MI_SF(HUBP0_DCSURF_SEC_VIEWPORT_START, SEC_VIEWPORT_Y_START, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C, PRI_VIEWPORT_WIDTH_C, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_C, PRI_VIEWPORT_HEIGHT_C, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_START_C, PRI_VIEWPORT_X_START_C, mask_sh),\
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MI_SF(HUBP0_DCSURF_PRI_VIEWPORT_START_C, PRI_VIEWPORT_Y_START_C, mask_sh),\
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MI_SF(HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH, PRIMARY_SURFACE_ADDRESS_HIGH, mask_sh),\
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MI_SF(HUBPREQ0_DCSURF_PRIMARY_SURFACE_ADDRESS, PRIMARY_SURFACE_ADDRESS, mask_sh),\
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MI_SF(HUBPREQ0_DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH, SECONDARY_SURFACE_ADDRESS_HIGH, mask_sh),\
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@ -459,6 +483,18 @@ struct dcn_mi_registers {
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type SURFACE_FLIP_TYPE;\
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type SURFACE_UPDATE_LOCK;\
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type SURFACE_FLIP_PENDING;\
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type PRI_VIEWPORT_WIDTH; \
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type PRI_VIEWPORT_HEIGHT; \
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type PRI_VIEWPORT_X_START; \
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type PRI_VIEWPORT_Y_START; \
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type SEC_VIEWPORT_WIDTH; \
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type SEC_VIEWPORT_HEIGHT; \
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type SEC_VIEWPORT_X_START; \
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type SEC_VIEWPORT_Y_START; \
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type PRI_VIEWPORT_WIDTH_C; \
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type PRI_VIEWPORT_HEIGHT_C; \
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type PRI_VIEWPORT_X_START_C; \
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type PRI_VIEWPORT_Y_START_C; \
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type PRIMARY_SURFACE_ADDRESS_HIGH;\
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type PRIMARY_SURFACE_ADDRESS;\
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type SECONDARY_SURFACE_ADDRESS_HIGH;\
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@ -89,6 +89,10 @@ struct mem_input_funcs {
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void (*dcc_control)(struct mem_input *mem_input, bool enable,
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bool independent_64b_blks);
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void (*mem_program_viewport)(
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struct mem_input *mem_input,
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const struct rect *viewport,
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const struct rect *viewport_c);
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#endif
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void (*mem_input_program_display_marks)(
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